Searched refs:writer_wm_sets (Results 1 – 13 of 13) sorted by relevance
493 if (ranges->writer_wm_sets[i].wm_inst > 3) in pp_rv_set_wm_ranges()497 ranges->writer_wm_sets[i].wm_inst; in pp_rv_set_wm_ranges()499 ranges->writer_wm_sets[i].max_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()501 ranges->writer_wm_sets[i].min_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()503 ranges->writer_wm_sets[i].max_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()505 ranges->writer_wm_sets[i].min_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()
503 ranges->writer_wm_sets[0].wm_inst = WM_A; in build_watermark_ranges()504 ranges->writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()505 ranges->writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()506 ranges->writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()507 ranges->writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()
1530 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1531 ranges.writer_wm_sets[0].min_fill_clk_mhz = socclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1532 ranges.writer_wm_sets[0].max_fill_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1533 ranges.writer_wm_sets[0].min_drain_clk_mhz = min_fclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1534 ranges.writer_wm_sets[0].max_drain_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1542 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1543 ranges.writer_wm_sets[0].min_fill_clk_mhz = 200; in dcn_bw_notify_pplib_of_wm_ranges()1544 ranges.writer_wm_sets[0].max_fill_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()1545 ranges.writer_wm_sets[0].min_drain_clk_mhz = 800; in dcn_bw_notify_pplib_of_wm_ranges()1546 ranges.writer_wm_sets[0].max_drain_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()[all …]
430 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()432 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()434 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()436 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()439 clock_ranges->writer_wm_sets[i].wm_inst; in smu_v13_0_5_set_watermarks_table()
661 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()663 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()665 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()667 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()670 clock_ranges->writer_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
513 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()515 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()517 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()519 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in yellow_carp_set_watermarks_table()522 clock_ranges->writer_wm_sets[i].wm_inst; in yellow_carp_set_watermarks_table()
1073 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()1075 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()1077 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()1079 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()1082 clock_ranges->writer_wm_sets[i].wm_inst; in renoir_set_watermarks_table()1084 clock_ranges->writer_wm_sets[i].wm_type; in renoir_set_watermarks_table()
93 struct pp_smu_wm_set_range writer_wm_sets[MAX_WATERMARK_SETS]; member
1377 ranges.writer_wm_sets[0].wm_inst = 0; in set_wm_ranges()1378 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1379 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()1380 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1381 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()
1624 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()1626 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()1628 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()1630 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in vangogh_set_watermarks_table()1633 clock_ranges->writer_wm_sets[i].wm_inst; in vangogh_set_watermarks_table()
2141 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()2143 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()2145 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()2147 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()2150 clock_ranges->writer_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
1838 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1840 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1842 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1844 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1847 clock_ranges->writer_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
2597 ranges.writer_wm_sets[0].wm_inst = 0; in dcn20_resource_construct()2598 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2599 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()2600 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2601 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()