Searched refs:wired (Results 1 – 25 of 112) sorted by relevance
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/Linux-v6.1/arch/mips/mm/ |
D | tlb-r4k.c | 387 unsigned long wired; in add_wired_entry() 400 wired = num_wired_entries(); in add_wired_entry() 401 write_c0_wired(wired + 1); in add_wired_entry() 402 write_c0_index(wired); in add_wired_entry() 458 unsigned long wired; in add_temporary_entry() local 467 wired = num_wired_entries(); in add_temporary_entry() 468 if (--temp_tlb_entry < wired) { in add_temporary_entry() 551 int wired = current_cpu_data.tlbsize - ntlb; in tlb_init() local 552 write_c0_wired(wired); in tlb_init() 553 write_c0_index(wired-1); in tlb_init()
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D | tlb-r3k.c | 223 static unsigned long wired = 0; in add_wired_entry() local 225 if (wired < 8) { in add_wired_entry() 235 write_c0_index(wired); in add_wired_entry() 236 wired++; /* BARRIER */ in add_wired_entry()
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D | init.c | 149 unsigned int wired; in kunmap_coherent() local 154 wired = num_wired_entries() - 1; in kunmap_coherent() 155 write_c0_wired(wired); in kunmap_coherent() 156 write_c0_index(wired); in kunmap_coherent() 157 write_c0_entryhi(UNIQUE_ENTRYHI(wired)); in kunmap_coherent()
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/Linux-v6.1/arch/mips/include/asm/ |
D | tlb.h | 16 unsigned int wired = read_c0_wired(); in num_wired_entries() local 19 wired &= MIPSR6_WIRED_WIRED; in num_wired_entries() 21 return wired; in num_wired_entries()
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/Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | img,pdc-intc.txt | 82 * An SoC peripheral that is wired through the PDC. 85 // The interrupt controller that this device is wired to. 96 * An interrupt generating device that is wired to a SysWake pin. 99 // The interrupt controller that this device is wired to.
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D | marvell,sei.txt | 10 AP and is wired while a second set comes from the CPs by the mean of 19 - #interrupt-cells: number of cells to define an SEI wired interrupt
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D | intel,ce4100-ioapic.txt | 15 The first number (P) represents the interrupt pin which is wired to the
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D | open-pic.txt | 81 * An interrupt generating device that is wired to an Open PIC. 89 // The interrupt controller that this device is wired to.
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D | openrisc,ompic.txt | 12 - interrupts : Specifies the interrupt line to which the ompic is wired.
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D | marvell,gicp.txt | 6 located in the Marvell CP110 to turn wired interrupts inside the CP
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D | atmel,aic.txt | 37 * An interrupt generating device that is wired to an AIC.
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/Linux-v6.1/Documentation/devicetree/bindings/media/ |
D | st-rc.txt | 12 be present iff the rx pins are wired up. 15 be present iff the tx pins are wired up.
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/Linux-v6.1/arch/arm/boot/dts/ |
D | ste-href-tvk1281618-r2.dtsi | 101 * the falling edge if they could be wired together. 122 * the falling edge if they could be wired together. 159 * the falling edge if they could be wired together.
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D | dra74x-p.dtsi | 24 /* MCAN interrupts are hard-wired to irqs 67, 68 */
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D | uniphier-ld6b.dtsi | 19 /* UART3 unavailable: the pads are not wired to the package balls */
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D | armada-385-db-ap.dts | 43 * This bus is wired to two EEPROM 78 * wired to the mini-USB connector
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D | omap4-mcpdm.dtsi | 5 * Only include this file if your board has pdmclk wired from the
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D | sun8i-r16-nintendo-nes-classic.dts | 51 /* VBUS is always on because it is wired to the power supply */
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/Linux-v6.1/Documentation/devicetree/bindings/sound/ |
D | adi,adau17x1.txt | 14 and ADDR1, as wired in hardware.
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/Linux-v6.1/Documentation/devicetree/bindings/clock/ |
D | qcom,spmi-clkdiv.txt | 4 These clocks are typically wired through alternate functions on
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/Linux-v6.1/Documentation/hwmon/ |
D | w83773g.rst | 27 The chip is wired over I2C/SMBus and specified over a temperature
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D | smsc47m192.rst | 57 the motherboard has this input wired to VID4. 87 would typically be wired to the diode inside the CPU)
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D | via686a.rst | 80 in which case the sensor inputs will not be wired. This is the case of 84 not wired for hardware monitoring.
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/Linux-v6.1/Documentation/ABI/testing/ |
D | sysfs-bus-iio-adc-envelope-detector | 8 of a comparator wired to an interrupt pin. Like so::
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/Linux-v6.1/Documentation/devicetree/bindings/soc/fsl/ |
D | guts.txt | 23 is wired to reset upon setting the HRESET_REQ bit in this register).
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