| /Linux-v6.1/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_tiling.c | 56 u32 size, unsigned int tiling, unsigned int stride) in i915_gem_fence_size() argument
62 if (tiling == I915_TILING_NONE) in i915_gem_fence_size()
68 stride *= i915_gem_tile_height(tiling); in i915_gem_fence_size()
96 unsigned int tiling, unsigned int stride) in i915_gem_fence_alignment() argument
104 if (tiling == I915_TILING_NONE) in i915_gem_fence_alignment()
114 return i915_gem_fence_size(i915, size, tiling, stride); in i915_gem_fence_alignment()
120 unsigned int tiling, unsigned int stride) in i915_tiling_ok() argument
126 if (tiling == I915_TILING_NONE) in i915_tiling_ok()
129 if (tiling > I915_TILING_LAST) in i915_tiling_ok()
150 (tiling == I915_TILING_Y && HAS_128_BYTE_Y_TILING(i915))) in i915_tiling_ok()
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| D | i915_gem_tiling.h | 16 unsigned int tiling, unsigned int stride);
18 unsigned int tiling, unsigned int stride);
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| D | i915_gem_object.h | 344 i915_gem_tile_height(unsigned int tiling) in i915_gem_tile_height() argument
346 GEM_BUG_ON(!tiling); in i915_gem_tile_height()
347 return tiling == I915_TILING_Y ? 32 : 8; in i915_gem_tile_height()
364 unsigned int tiling, unsigned int stride);
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| /Linux-v6.1/drivers/gpu/drm/tegra/ |
| D | fb.c | 44 struct tegra_bo_tiling *tiling) in tegra_fb_get_tiling() argument
50 tiling->sector_layout = TEGRA_BO_SECTOR_LAYOUT_TEGRA; in tegra_fb_get_tiling()
52 tiling->sector_layout = TEGRA_BO_SECTOR_LAYOUT_GPU; in tegra_fb_get_tiling()
59 tiling->mode = TEGRA_BO_TILING_MODE_PITCH; in tegra_fb_get_tiling()
60 tiling->value = 0; in tegra_fb_get_tiling()
64 tiling->mode = TEGRA_BO_TILING_MODE_TILED; in tegra_fb_get_tiling()
65 tiling->value = 0; in tegra_fb_get_tiling()
69 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; in tegra_fb_get_tiling()
70 tiling->value = 0; in tegra_fb_get_tiling()
74 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; in tegra_fb_get_tiling()
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| D | hub.c | 432 struct tegra_bo_tiling *tiling = &plane_state->tiling; in tegra_shared_plane_atomic_check() local
446 err = tegra_fb_get_tiling(new_plane_state->fb, tiling); in tegra_shared_plane_atomic_check()
450 if (tiling->mode == TEGRA_BO_TILING_MODE_BLOCK && in tegra_shared_plane_atomic_check()
456 if (tiling->sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU && in tegra_shared_plane_atomic_check()
637 if (tegra_plane_state->tiling.sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU) in tegra_shared_plane_atomic_update()
717 unsigned long height = tegra_plane_state->tiling.value; in tegra_shared_plane_atomic_update()
720 switch (tegra_plane_state->tiling.mode) { in tegra_shared_plane_atomic_update()
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| D | gem.h | 49 struct tegra_bo_tiling tiling; member
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| D | plane.h | 49 struct tegra_bo_tiling tiling; member
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| D | plane.c | 63 copy->tiling = state->tiling; in tegra_plane_atomic_duplicate_state()
285 tegra_state->tiling.mode == TEGRA_BO_TILING_MODE_TILED) in tegra_plane_calculate_memory_bandwidth()
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| D | dc.c | 427 unsigned long height = window->tiling.value; in tegra_dc_setup_window()
429 switch (window->tiling.mode) { in tegra_dc_setup_window()
446 switch (window->tiling.mode) { in tegra_dc_setup_window()
626 struct tegra_bo_tiling *tiling = &plane_state->tiling; in tegra_plane_atomic_check() local
658 err = tegra_fb_get_tiling(new_plane_state->fb, tiling); in tegra_plane_atomic_check()
662 if (tiling->mode == TEGRA_BO_TILING_MODE_BLOCK && in tegra_plane_atomic_check()
758 window.tiling = tegra_plane_state->tiling; in tegra_plane_atomic_update()
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| D | drm.h | 198 struct tegra_bo_tiling *tiling);
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| D | drm.c | 653 bo->tiling.mode = mode; in tegra_gem_set_tiling()
654 bo->tiling.value = value; in tegra_gem_set_tiling()
675 switch (bo->tiling.mode) { in tegra_gem_get_tiling()
688 args->value = bo->tiling.value; in tegra_gem_get_tiling()
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| /Linux-v6.1/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_client_blt.c | 96 enum client_tiling tiling; member
134 if (buf->tiling == CLIENT_TILING_X && !supports_x_tiling(buf->vma->vm->i915)) in fast_blit_ok()
168 if (src->tiling == CLIENT_TILING_4) { in prepare_blit()
171 } else if (src->tiling == CLIENT_TILING_Y) { in prepare_blit()
173 } else if (src->tiling == CLIENT_TILING_X) { in prepare_blit()
180 if (dst->tiling == CLIENT_TILING_4) { in prepare_blit()
183 } else if (dst->tiling == CLIENT_TILING_Y) { in prepare_blit()
185 } else if (dst->tiling == CLIENT_TILING_X) { in prepare_blit()
207 if (src->tiling == CLIENT_TILING_Y) in prepare_blit()
209 if (dst->tiling == CLIENT_TILING_Y) in prepare_blit()
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| D | i915_gem_mman.c | 33 unsigned int tiling; member
46 if (tile->tiling == I915_TILING_NONE) in tiled_offset()
52 if (tile->tiling == I915_TILING_X) { in tiled_offset()
106 err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride); in check_partial_mapping()
109 tile->tiling, tile->stride, err); in check_partial_mapping()
113 GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling); in check_partial_mapping()
164 tile->tiling ? tile_row_pages(obj) : 0, in check_partial_mapping()
165 vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride, in check_partial_mapping()
194 err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride); in check_partial_mappings()
197 tile->tiling, tile->stride, err); in check_partial_mappings()
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| /Linux-v6.1/drivers/gpu/drm/i915/gt/ |
| D | intel_ggtt_fencing.c | 76 if (fence->tiling) { in i965_write_fence_reg()
85 if (fence->tiling == I915_TILING_Y) in i965_write_fence_reg()
117 if (fence->tiling) { in i915_write_fence_reg()
119 unsigned int tiling = fence->tiling; in i915_write_fence_reg() local
120 bool is_y_tiled = tiling == I915_TILING_Y; in i915_write_fence_reg()
151 if (fence->tiling) { in i830_write_fence_reg()
155 if (fence->tiling == I915_TILING_Y) in i830_write_fence_reg()
208 fence->tiling = 0; in fence_update()
226 fence->tiling = i915_gem_object_get_tiling(vma->obj); in fence_update()
302 fence->tiling = 0; in i915_vma_revoke_fence()
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| D | intel_ggtt_fencing.h | 40 u32 tiling; member
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| /Linux-v6.1/drivers/gpu/drm/i915/display/ |
| D | intel_plane_initial.c | 125 switch (plane_config->tiling) { in initial_plane_vma()
132 plane_config->tiling; in initial_plane_vma()
135 MISSING_CASE(plane_config->tiling); in initial_plane_vma()
274 if (plane_config->tiling) in intel_find_initial_plane_obj()
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| D | intel_fb.c | 1870 unsigned int tiling, stride; in intel_framebuffer_init() local
1879 tiling = i915_gem_object_get_tiling(obj); in intel_framebuffer_init()
1888 if (tiling != I915_TILING_NONE && in intel_framebuffer_init()
1889 tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { in intel_framebuffer_init()
1895 if (tiling == I915_TILING_X) { in intel_framebuffer_init()
1897 } else if (tiling == I915_TILING_Y) { in intel_framebuffer_init()
1918 tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { in intel_framebuffer_init()
1939 if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) { in intel_framebuffer_init()
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| D | skl_universal_plane.c | 2376 u32 val, base, offset, stride_mult, tiling, alpha; in skl_get_initial_plane_config() local
2424 tiling = val & PLANE_CTL_TILED_MASK; in skl_get_initial_plane_config()
2425 switch (tiling) { in skl_get_initial_plane_config()
2430 plane_config->tiling = I915_TILING_X; in skl_get_initial_plane_config()
2434 plane_config->tiling = I915_TILING_Y; in skl_get_initial_plane_config()
2466 MISSING_CASE(tiling); in skl_get_initial_plane_config()
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| /Linux-v6.1/drivers/gpu/drm/vc4/ |
| D | vc4_render_cl.c | 440 uint8_t tiling = VC4_GET_FIELD(surf->bits, in vc4_rcl_surface_setup() local
491 if (tiling > VC4_TILING_FORMAT_LT) { in vc4_rcl_surface_setup()
525 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, in vc4_rcl_surface_setup()
539 uint8_t tiling = VC4_GET_FIELD(surf->bits, in vc4_rcl_render_config_surface_setup() local
568 if (tiling > VC4_TILING_FORMAT_LT) { in vc4_rcl_render_config_surface_setup()
586 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, in vc4_rcl_render_config_surface_setup()
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| D | vc4_plane.c | 729 u32 tiling, src_y; in vc4_plane_mode_set() local
767 tiling = SCALER_CTL0_TILING_LINEAR; in vc4_plane_mode_set()
830 tiling = SCALER_CTL0_TILING_256B_OR_T; in vc4_plane_mode_set()
866 tiling = SCALER_CTL0_TILING_128B; in vc4_plane_mode_set()
872 tiling = SCALER_CTL0_TILING_64B; in vc4_plane_mode_set()
875 tiling = SCALER_CTL0_TILING_128B; in vc4_plane_mode_set()
878 tiling = SCALER_CTL0_TILING_256B_OR_T; in vc4_plane_mode_set()
969 VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) | in vc4_plane_mode_set()
1014 VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) | in vc4_plane_mode_set()
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| /Linux-v6.1/drivers/staging/media/ipu3/ |
| D | ipu3-css-params.c | 313 unsigned int tiling; member
426 unsigned int tiling = 0; in imgu_css_osys_calc_frame_and_stripe_params() local
466 &tiling); in imgu_css_osys_calc_frame_and_stripe_params()
472 frame_params[pin].tiling = tiling; in imgu_css_osys_calc_frame_and_stripe_params()
998 fr_pr->tiling = frame_params[pin].tiling; in imgu_css_osys_calc()
1081 if (frame_params[pin].tiling) { in imgu_css_osys_calc()
1150 param->tiling = frame_params[pin].tiling; in imgu_css_osys_calc()
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20.c | 343 unsigned int tiling, in get_meta_and_pte_attr() argument
348 bool surf_linear = (tiling == dm_sw_linear); in get_meta_and_pte_attr()
419 (enum dm_swizzle_mode)(tiling), in get_meta_and_pte_attr()
457 if (tiling != dm_sw_linear) in get_meta_and_pte_attr()
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| D | display_rq_dlg_calc_20v2.c | 343 unsigned int tiling, in get_meta_and_pte_attr() argument
348 bool surf_linear = (tiling == dm_sw_linear); in get_meta_and_pte_attr()
419 (enum dm_swizzle_mode)(tiling), in get_meta_and_pte_attr()
457 if (tiling != dm_sw_linear) in get_meta_and_pte_attr()
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 330 unsigned int tiling, in get_meta_and_pte_attr() argument
336 bool surf_linear = (tiling == dm_sw_linear); in get_meta_and_pte_attr()
411 (enum dm_swizzle_mode) (tiling), in get_meta_and_pte_attr()
449 if (tiling != dm_sw_linear) in get_meta_and_pte_attr()
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_rq_dlg_calc_30.c | 288 unsigned int tiling, in get_meta_and_pte_attr() argument
295 bool surf_linear = (tiling == dm_sw_linear); in get_meta_and_pte_attr()
365 (enum dm_swizzle_mode)(tiling), in get_meta_and_pte_attr()
405 if (tiling != dm_sw_linear) in get_meta_and_pte_attr()
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