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Searched refs:tg (Results 1 – 25 of 95) sorted by relevance

1234

/Linux-v6.1/block/
Dblk-throttle.c92 static inline struct blkcg_gq *tg_to_blkg(struct throtl_grp *tg) in tg_to_blkg() argument
94 return pd_to_blkg(&tg->pd); in tg_to_blkg()
121 struct throtl_grp *tg = sq_to_tg(sq); in sq_to_td() local
123 if (tg) in sq_to_td()
124 return tg->td; in sq_to_td()
147 static uint64_t tg_bps_limit(struct throtl_grp *tg, int rw) in tg_bps_limit() argument
149 struct blkcg_gq *blkg = tg_to_blkg(tg); in tg_bps_limit()
156 td = tg->td; in tg_bps_limit()
157 ret = tg->bps[rw][td->limit_index]; in tg_bps_limit()
161 tg->iops[rw][td->limit_index]) in tg_bps_limit()
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Dblk-throttle.h32 struct throtl_grp *tg; /* tg this qnode belongs to */ member
185 struct throtl_grp *tg = blkg_to_tg(bio->bi_blkg); in blk_should_throtl() local
189 if (tg->has_rules_iops[rw]) in blk_should_throtl()
192 if (tg->has_rules_bps[rw] && !bio_flagged(bio, BIO_BPS_THROTTLED)) in blk_should_throtl()
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.h117 #define DCE110TG_FROM_TG(tg)\ argument
118 container_of(tg, struct dce110_timing_generator, base)
121 struct dce110_timing_generator *tg,
128 struct timing_generator *tg,
136 struct timing_generator *tg,
140 bool dce110_timing_generator_enable_crtc(struct timing_generator *tg);
141 bool dce110_timing_generator_disable_crtc(struct timing_generator *tg);
144 struct timing_generator *tg,
151 struct timing_generator *tg);
154 struct timing_generator *tg,
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Ddce110_timing_generator.c66 struct timing_generator *tg, in dce110_timing_generator_apply_front_porch_workaround() argument
92 struct timing_generator *tg) in dce110_timing_generator_is_in_vertical_blank() argument
97 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce110_timing_generator_is_in_vertical_blank()
100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank()
106 struct timing_generator *tg, in dce110_timing_generator_set_early_control() argument
110 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce110_timing_generator_set_early_control()
113 regval = dm_read_reg(tg->ctx, address); in dce110_timing_generator_set_early_control()
116 dm_write_reg(tg->ctx, address, regval); in dce110_timing_generator_set_early_control()
123 bool dce110_timing_generator_enable_crtc(struct timing_generator *tg) in dce110_timing_generator_enable_crtc() argument
127 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce110_timing_generator_enable_crtc()
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Ddce110_timing_generator_v.c42 tg->ctx->logger
53 static bool dce110_timing_generator_v_enable_crtc(struct timing_generator *tg) in dce110_timing_generator_v_enable_crtc() argument
64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
69 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
80 static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg) in dce110_timing_generator_v_disable_crtc() argument
84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
99 static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg) in dce110_timing_generator_v_blank_crtc() argument
102 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_blank_crtc()
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Ddce110_hw_sequencer.c672 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream() local
690 tg->funcs->set_early_control(tg, early_control); in dce110_enable_stream()
1367 pipe_ctx->stream_res.tg->inst + 1); in build_audio_output()
1397 if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color) { in program_scaler()
1406 pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color( in program_scaler()
1407 pipe_ctx->stream_res.tg, in program_scaler()
1430 pipe_ctx->stream_res.tg->funcs->set_blank_color( in dce110_enable_stream_timing()
1431 pipe_ctx->stream_res.tg, in dce110_enable_stream_timing()
1438 pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true); in dce110_enable_stream_timing()
1457 pipe_ctx->stream_res.tg->funcs->program_timing( in dce110_enable_stream_timing()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/inc/hw/
Dtiming_generator.h161 bool (*validate_timing)(struct timing_generator *tg,
163 void (*program_timing)(struct timing_generator *tg,
183 bool (*enable_crtc)(struct timing_generator *tg);
184 bool (*disable_crtc)(struct timing_generator *tg);
186 void (*phantom_crtc_post_enable)(struct timing_generator *tg);
188 bool (*immediate_disable_crtc)(struct timing_generator *tg);
189 bool (*is_counter_moving)(struct timing_generator *tg);
190 void (*get_position)(struct timing_generator *tg,
193 uint32_t (*get_frame_count)(struct timing_generator *tg);
195 struct timing_generator *tg,
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c86 struct timing_generator *tg) in dce120_timing_generator_is_in_vertical_blank() argument
89 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce120_timing_generator_is_in_vertical_blank()
91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank()
102 struct timing_generator *tg, in dce120_timing_generator_validate_timing() argument
111 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce120_timing_generator_validate_timing()
114 tg, in dce120_timing_generator_validate_timing()
128 static bool dce120_tg_validate_timing(struct timing_generator *tg, in dce120_tg_validate_timing() argument
131 return dce120_timing_generator_validate_timing(tg, timing, SIGNAL_TYPE_NONE); in dce120_tg_validate_timing()
136 static bool dce120_timing_generator_enable_crtc(struct timing_generator *tg) in dce120_timing_generator_enable_crtc() argument
139 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce120_timing_generator_enable_crtc()
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/Linux-v6.1/kernel/sched/
Dautogroup.h14 struct task_group *tg; member
21 extern void autogroup_free(struct task_group *tg);
23 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument
25 return !!tg->autogroup; in task_group_is_autogroup()
28 extern bool task_wants_autogroup(struct task_struct *p, struct task_group *tg);
31 autogroup_task_group(struct task_struct *p, struct task_group *tg) in autogroup_task_group() argument
36 if (enabled && task_wants_autogroup(p, tg)) in autogroup_task_group()
37 return p->signal->autogroup->tg; in autogroup_task_group()
39 return tg; in autogroup_task_group()
42 extern int autogroup_path(struct task_group *tg, char *buf, int buflen);
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Dautogroup.c35 autogroup_default.tg = &root_task_group; in autogroup_init()
42 void autogroup_free(struct task_group *tg) in autogroup_free() argument
44 kfree(tg->autogroup); in autogroup_free()
53 ag->tg->rt_se = NULL; in autogroup_destroy()
54 ag->tg->rt_rq = NULL; in autogroup_destroy()
56 sched_release_group(ag->tg); in autogroup_destroy()
57 sched_destroy_group(ag->tg); in autogroup_destroy()
88 struct task_group *tg; in autogroup_create() local
93 tg = sched_create_group(&root_task_group); in autogroup_create()
94 if (IS_ERR(tg)) in autogroup_create()
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Drt.c192 void unregister_rt_sched_group(struct task_group *tg) in unregister_rt_sched_group() argument
194 if (tg->rt_se) in unregister_rt_sched_group()
195 destroy_rt_bandwidth(&tg->rt_bandwidth); in unregister_rt_sched_group()
199 void free_rt_sched_group(struct task_group *tg) in free_rt_sched_group() argument
204 if (tg->rt_rq) in free_rt_sched_group()
205 kfree(tg->rt_rq[i]); in free_rt_sched_group()
206 if (tg->rt_se) in free_rt_sched_group()
207 kfree(tg->rt_se[i]); in free_rt_sched_group()
210 kfree(tg->rt_rq); in free_rt_sched_group()
211 kfree(tg->rt_se); in free_rt_sched_group()
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Dcore.c1254 int tg_nop(struct task_group *tg, void *data) in tg_nop() argument
1736 struct task_group *tg = &root_task_group; in uclamp_update_root_tg() local
1738 uclamp_se_set(&tg->uclamp_req[UCLAMP_MIN], in uclamp_update_root_tg()
1740 uclamp_se_set(&tg->uclamp_req[UCLAMP_MAX], in uclamp_update_root_tg()
4636 struct task_group *tg; in sched_cgroup_fork() local
4637 tg = container_of(kargs->cset->subsys[cpu_cgrp_id], in sched_cgroup_fork()
4639 tg = autogroup_task_group(p, tg); in sched_cgroup_fork()
4640 p->sched_task_group = tg; in sched_cgroup_fork()
10066 static inline void alloc_uclamp_sched_group(struct task_group *tg, in alloc_uclamp_sched_group() argument
10073 uclamp_se_set(&tg->uclamp_req[clamp_id], in alloc_uclamp_sched_group()
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Dsched.h454 extern int tg_nop(struct task_group *tg, void *data);
456 extern void free_fair_sched_group(struct task_group *tg);
457 extern int alloc_fair_sched_group(struct task_group *tg, struct task_group *parent);
458 extern void online_fair_sched_group(struct task_group *tg);
459 extern void unregister_fair_sched_group(struct task_group *tg);
460 extern void init_tg_cfs_entry(struct task_group *tg, struct cfs_rq *cfs_rq,
469 extern void init_tg_rt_entry(struct task_group *tg, struct rt_rq *rt_rq,
472 extern int sched_group_set_rt_runtime(struct task_group *tg, long rt_runtime_us);
473 extern int sched_group_set_rt_period(struct task_group *tg, u64 rt_period_us);
474 extern long sched_group_rt_runtime(struct task_group *tg);
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_timing_generator.c87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); in program_timing()
124 struct timing_generator *tg, in dce60_timing_generator_enable_advanced_request() argument
128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce60_timing_generator_enable_advanced_request()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c100 struct timing_generator *tg; in dcn10_lock_all_pipes() local
105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
114 !tg->funcs->is_tg_enabled(tg)) in dcn10_lock_all_pipes()
354 struct timing_generator *tg = pool->timing_generators[i]; in dcn10_log_hw_state() local
357 optc1_read_otg_state(DCN10TG_FROM_TG(tg), &s); in dcn10_log_hw_state()
369 s.blank_enabled = tg->funcs->is_blanked(tg); in dcn10_log_hw_state()
376 tg->inst, in dcn10_log_hw_state()
400 tg->funcs->clear_optc_underflow(tg); in dcn10_log_hw_state()
538 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn10_did_underflow_occur() local
540 if (tg->funcs->is_optc_underflow_occurred(tg)) { in dcn10_did_underflow_occur()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_hwseq.c163 struct timing_generator *tg) in dcn201_init_blank() argument
177 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
182 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
283 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw() local
285 if (tg->funcs->is_tg_enabled(tg)) { in dcn201_init_hw()
286 dcn201_init_blank(dc, tg); in dcn201_init_hw()
291 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw() local
293 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
294 tg->funcs->lock(tg); in dcn201_init_hw()
315 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw() local
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_timing_generator.c87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); in program_timing()
124 struct timing_generator *tg, in dce80_timing_generator_enable_advanced_request() argument
128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce80_timing_generator_enable_advanced_request()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c167 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
168 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
169 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
170 pipe_ctx->stream_res.tg, in dcn20_setup_gsl_group_as_lock()
173 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock()
174 pipe_ctx->stream_res.tg, group_idx, enable ? 4 : 0); in dcn20_setup_gsl_group_as_lock()
280 struct timing_generator *tg) in dcn20_init_blank() argument
295 tg->funcs->get_otg_active_size(tg, in dcn20_init_blank()
300 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn20_init_blank()
672 pipe_ctx->stream_res.tg->inst, in dcn20_enable_stream_timing()
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.c56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
/Linux-v6.1/drivers/iio/chemical/
Dsgp40.c167 struct sgp40_tg_measure tg = {.command = {0x26, 0x0F}}; in sgp40_measure_resistance_raw() local
174 tg.rht_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
175 tg.rht_crc = crc8(sgp40_crc8_table, (u8 *)&tg.rht_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
179 tg.temp_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
180 tg.temp_crc = crc8(sgp40_crc8_table, (u8 *)&tg.temp_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
184 ret = i2c_master_send(client, (const char *)&tg, sizeof(tg)); in sgp40_measure_resistance_raw()
185 if (ret != sizeof(tg)) { in sgp40_measure_resistance_raw()
186 dev_warn(data->dev, "i2c_master_send ret: %d sizeof: %zu\n", ret, sizeof(tg)); in sgp40_measure_resistance_raw()
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hwseq.c220 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn31_init_hw() local
224 if (tg) { in dcn31_init_hw()
225 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn31_init_hw()
226 tg->funcs->get_optc_source(tg, &num_opps, in dcn31_init_hw()
534 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in dcn31_reset_back_end_for_pipe()
535 pipe_ctx->stream_res.tg, in dcn31_reset_back_end_for_pipe()
537 pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); in dcn31_reset_back_end_for_pipe()
538 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); in dcn31_reset_back_end_for_pipe()
539 if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) in dcn31_reset_back_end_for_pipe()
540 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn31_reset_back_end_for_pipe()
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/Linux-v6.1/arch/powerpc/kernel/
Dsmp.c837 struct thread_groups *tg = &tglp->property_tgs[property_idx++]; in parse_thread_groups() local
839 tg->property = thread_group_array[i]; in parse_thread_groups()
840 tg->nr_groups = thread_group_array[i + 1]; in parse_thread_groups()
841 tg->threads_per_group = thread_group_array[i + 2]; in parse_thread_groups()
842 total_threads = tg->nr_groups * tg->threads_per_group; in parse_thread_groups()
847 tg->thread_list[j] = thread_list[j]; in parse_thread_groups()
872 static int get_cpu_thread_group_start(int cpu, struct thread_groups *tg) in get_cpu_thread_group_start() argument
877 for (i = 0; i < tg->nr_groups; i++) { in get_cpu_thread_group_start()
878 int group_start = i * tg->threads_per_group; in get_cpu_thread_group_start()
880 for (j = 0; j < tg->threads_per_group; j++) { in get_cpu_thread_group_start()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/link/
Dlink_hwss_hpo_dp.c109 struct timing_generator *tg = pipe_ctx->stream_res.tg; in setup_hpo_dp_stream_encoder() local
113 dto_params.otg_inst = tg->inst; in setup_hpo_dp_stream_encoder()
119 dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, stream_enc->inst); in setup_hpo_dp_stream_encoder()
131 struct timing_generator *tg = pipe_ctx->stream_res.tg; in reset_hpo_dp_stream_encoder() local
134 dto_params.otg_inst = tg->inst; in reset_hpo_dp_stream_encoder()
140 dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, stream_enc->inst); in reset_hpo_dp_stream_encoder()
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_hwseq.c138 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
139 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
145 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
146 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
196 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm()
197 pipe_ctx->stream_res.tg, in dcn314_update_odm()
201 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
202 pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); in dcn314_update_odm()
/Linux-v6.1/drivers/firmware/efi/libstub/
Darm64-stub.c35 u64 tg; in check_platform_features() local
49 tg = (read_cpuid(ID_AA64MMFR0_EL1) >> ID_AA64MMFR0_EL1_TGRAN_SHIFT) & 0xf; in check_platform_features()
50 if (tg < ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MIN || tg > ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MAX) { in check_platform_features()

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