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Searched refs:tegra_dc_readl (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/tegra/
Dhub.c104 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); in tegra_plane_readl()
206 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_shared_plane_update()
226 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_shared_plane_activate()
240 return tegra_dc_readl(dc, offset) & OWNER_MASK; in tegra_shared_plane_get_owner()
269 value = tegra_dc_readl(dc, offset); in tegra_shared_plane_set_owner()
896 value = tegra_dc_readl(dc, DC_CMD_IHUB_COMMON_MISC_CTL); in tegra_display_hub_update()
900 value = tegra_dc_readl(dc, DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER); in tegra_display_hub_update()
905 tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_display_hub_update()
907 tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_display_hub_update()
Ddc.c54 value = tegra_dc_readl(dc, offset); in tegra_dc_readl_active()
86 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); in tegra_plane_readl()
957 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in __tegra_cursor_atomic_update()
961 value = tegra_dc_readl(dc, DC_DISP_BLEND_CURSOR_CONTROL); in __tegra_cursor_atomic_update()
1022 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_cursor_atomic_disable()
1083 (void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_cursor_atomic_async_update()
1087 (void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_cursor_atomic_async_update()
1654 offset, tegra_dc_readl(dc, offset)); in tegra_dc_show_regs()
1683 value = tegra_dc_readl(dc, DC_COM_CRC_CHECKSUM); in tegra_dc_show_crc()
1771 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); in tegra_dc_enable_vblank()
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Drgb.c111 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
Dsor.c2225 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_sor_hdmi_disable()
2462 value = tegra_dc_readl(dc, DC_DISP_DISP_SIGNAL_OPTIONS0); in tegra_sor_hdmi_enable()
2557 value = tegra_dc_readl(dc, DC_DISP_DISP_COLOR_CONTROL); in tegra_sor_hdmi_enable()
2622 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_sor_hdmi_enable()
2632 value = tegra_dc_readl(dc, DC_DISP_CORE_SOR_SET_CONTROL(sor->index)); in tegra_sor_hdmi_enable()
2683 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_sor_dp_disable()
2924 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_sor_dp_enable()
Ddc.h126 static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned int offset) in tegra_dc_readl() function
Ddsi.c859 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_dsi_encoder_disable()
937 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_dsi_encoder_enable()
Dhdmi.c1181 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_hdmi_encoder_disable()
1418 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); in tegra_hdmi_encoder_enable()