Searched refs:tctrl (Results 1 – 5 of 5) sorted by relevance
170 u32 tctrl; /* 0x040 Transmit control register */ member821 iowrite32be(ioread32be(®s->tctrl) & ~TCTRL_GTS, ®s->tctrl); in graceful_start()847 tmp = ioread32be(®s->tctrl) | TCTRL_GTS; in graceful_stop()848 iowrite32be(tmp, ®s->tctrl); in graceful_stop()1057 u32 rctrl, tctrl; in dtsec_set_tstamp() local1063 tctrl = ioread32be(®s->tctrl); in dtsec_set_tstamp()1067 tctrl |= TCTRL_TTSE; in dtsec_set_tstamp()1070 tctrl &= ~TCTRL_TTSE; in dtsec_set_tstamp()1074 iowrite32be(tctrl, ®s->tctrl); in dtsec_set_tstamp()
1253 struct controller *tctrl; in unload_cpqphpd() local1306 tctrl = ctrl; in unload_cpqphpd()1308 kfree(tctrl); in unload_cpqphpd()
217 u32 tctrl = 0; in gfar_mac_tx_config() local220 tctrl |= TCTRL_INIT_CSUM; in gfar_mac_tx_config()223 tctrl |= TCTRL_TXSCHED_PRIO; in gfar_mac_tx_config()225 tctrl |= TCTRL_TXSCHED_WRRS; in gfar_mac_tx_config()231 tctrl |= TCTRL_VLINS; in gfar_mac_tx_config()233 gfar_write(®s->tctrl, tctrl); in gfar_mac_tx_config()
723 u32 tctrl; /* 0x.100 - Transmit Control Register */ member
1341 u32 value, tctrl, pctrl, rpd_ctrl; in tegra210_pmc_utmi_enable_phy_sleepwalk() local1350 tctrl = TCTRL_VALUE(value); in tegra210_pmc_utmi_enable_phy_sleepwalk()1434 value |= (TCTRL_VAL(tctrl) | PCTRL_VAL(pctrl)); in tegra210_pmc_utmi_enable_phy_sleepwalk()
