Searched refs:tR (Results 1 – 7 of 7) sorted by relevance
180 u16 tR; member
21 read registers (tR). If not present then a default of 20us is used.
21 read registers (tR). Required if property "gpios" is not used
674 timings->tR_max = 1000000ULL * onfi->tR; in onfi_fill_sdr_interface_config()710 timings->tR_max = 1000000ULL * onfi->tR; in onfi_fill_nvddr_interface_config()
450 unsigned int tR; member2414 nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns); in marvell_nfc_setup_interface()2416 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_interface()2418 if (nfc_tmg.tR + 3 > nfc_tmg.tCH) in marvell_nfc_setup_interface()2419 nfc_tmg.tR = nfc_tmg.tCH - 3; in marvell_nfc_setup_interface()2421 nfc_tmg.tR = 0; in marvell_nfc_setup_interface()2439 NDTR1_TR(nfc_tmg.tR); in marvell_nfc_setup_interface()
316 onfi->tR = le16_to_cpu(p->t_r); in nand_onfi_detect()
1812 tS, tR = self.dmesg[lp]['end'], self.dmesg[phase]['start']1813 tL = tR - tS1816 left = True if tR > tZero else False2002 tS = tR = False2009 if not tR and ps >= self.tResumed:2011 tR = True
