Searched refs:stable_pstate_sclk (Results 1 – 3 of 3) sorted by relevance
691 unsigned long stable_pstate_sclk; in smu8_update_sclk_limit() local724 stable_pstate_sclk = (hwmgr->dyn_state.max_clock_voltage_on_ac.mclk * in smu8_update_sclk_limit()727 if (clock < stable_pstate_sclk) in smu8_update_sclk_limit()728 clock = stable_pstate_sclk; in smu8_update_sclk_limit()
3256 uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in vega10_apply_state_adjust_rules() local3297 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()3302 if (stable_pstate_sclk >= in vega10_apply_state_adjust_rules()3304 stable_pstate_sclk = in vega10_apply_state_adjust_rules()3311 stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk; in vega10_apply_state_adjust_rules()3315 minimum_clocks.engineClock = stable_pstate_sclk; in vega10_apply_state_adjust_rules()3380 vega10_ps->performance_levels[i].gfx_clock = stable_pstate_sclk; in vega10_apply_state_adjust_rules()
3290 int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in smu7_apply_state_adjust_rules() local3318 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()3322 if (stable_pstate_sclk >= in smu7_apply_state_adjust_rules()3324 stable_pstate_sclk = in smu7_apply_state_adjust_rules()3331 stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk; in smu7_apply_state_adjust_rules()3335 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()3433 smu7_ps->performance_levels[i].engine_clock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()
