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Searched refs:set_wptr (Results 1 – 25 of 37) sorted by relevance

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/Linux-v6.1/drivers/gpu/drm/radeon/
Dradeon_asic.c195 .set_wptr = &r100_gfx_set_wptr,
345 .set_wptr = &r100_gfx_set_wptr,
359 .set_wptr = &r100_gfx_set_wptr,
916 .set_wptr = &r600_gfx_set_wptr,
929 .set_wptr = &r600_dma_set_wptr,
1014 .set_wptr = &uvd_v1_0_set_wptr,
1213 .set_wptr = &uvd_v1_0_set_wptr,
1320 .set_wptr = &r600_gfx_set_wptr,
1333 .set_wptr = &r600_dma_set_wptr,
1630 .set_wptr = &cayman_gfx_set_wptr,
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ring.h166 void (*set_wptr)(struct amdgpu_ring *ring); member
290 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
Djpeg_v2_5.c647 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
677 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
Dvce_v3_0.c928 .set_wptr = vce_v3_0_ring_set_wptr,
952 .set_wptr = vce_v3_0_ring_set_wptr,
Duvd_v6_0.c1551 .set_wptr = uvd_v6_0_ring_set_wptr,
1577 .set_wptr = uvd_v6_0_ring_set_wptr,
1606 .set_wptr = uvd_v6_0_enc_ring_set_wptr,
Djpeg_v3_0.c565 .set_wptr = jpeg_v3_0_dec_ring_set_wptr,
Djpeg_v4_0.c562 .set_wptr = jpeg_v4_0_dec_ring_set_wptr,
Dvcn_v2_5.c1534 .set_wptr = vcn_v2_5_dec_ring_set_wptr,
1565 .set_wptr = vcn_v2_5_dec_ring_set_wptr,
1665 .set_wptr = vcn_v2_5_enc_ring_set_wptr,
1695 .set_wptr = vcn_v2_5_enc_ring_set_wptr,
Dvce_v2_0.c641 .set_wptr = vce_v2_0_ring_set_wptr,
Dsdma_v4_0.c2338 .set_wptr = sdma_v4_0_ring_set_wptr,
2375 .set_wptr = sdma_v4_0_ring_set_wptr,
2408 .set_wptr = sdma_v4_0_page_ring_set_wptr,
2441 .set_wptr = sdma_v4_0_page_ring_set_wptr,
Duvd_v3_1.c186 .set_wptr = uvd_v3_1_ring_set_wptr,
Duvd_v4_2.c775 .set_wptr = uvd_v4_2_ring_set_wptr,
Djpeg_v1_0.c555 .set_wptr = jpeg_v1_0_decode_ring_set_wptr,
Duvd_v5_0.c883 .set_wptr = uvd_v5_0_ring_set_wptr,
Djpeg_v2_0.c768 .set_wptr = jpeg_v2_0_dec_ring_set_wptr,
Dvcn_v3_0.c1743 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
1900 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
2001 .set_wptr = vcn_v3_0_enc_ring_set_wptr,
Dsi_dma.c729 .set_wptr = si_dma_ring_set_wptr,
Duvd_v7_0.c1808 .set_wptr = uvd_v7_0_ring_set_wptr,
1841 .set_wptr = uvd_v7_0_enc_ring_set_wptr,
Dvcn_v1_0.c1982 .set_wptr = vcn_v1_0_dec_ring_set_wptr,
2017 .set_wptr = vcn_v1_0_enc_ring_set_wptr,
Dvcn_v2_0.c2019 .set_wptr = vcn_v2_0_dec_ring_set_wptr,
2050 .set_wptr = vcn_v2_0_enc_ring_set_wptr,
Dsdma_v2_4.c1142 .set_wptr = sdma_v2_4_ring_set_wptr,
Dvce_v4_0.c1109 .set_wptr = vce_v4_0_ring_set_wptr,
Dcik_sdma.c1252 .set_wptr = cik_sdma_ring_set_wptr,
Dmes_v10_1.c85 .set_wptr = mes_v10_1_ring_set_wptr,
Dmes_v11_0.c86 .set_wptr = mes_v11_0_ring_set_wptr,

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