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Searched refs:sdma_cntl (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dsi_dma.c594 u32 sdma_cntl; in si_dma_set_trap_irq_state() local
600 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
601 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
602 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
605 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
606 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
607 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
616 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
617 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
618 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
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Dsdma_v2_4.c1008 u32 sdma_cntl; in sdma_v2_4_set_trap_irq_state() local
1014 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v2_4_set_trap_irq_state()
1015 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1016 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v2_4_set_trap_irq_state()
1019 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v2_4_set_trap_irq_state()
1020 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
1021 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v2_4_set_trap_irq_state()
1030 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET); in sdma_v2_4_set_trap_irq_state()
1031 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1032 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl); in sdma_v2_4_set_trap_irq_state()
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Dsdma_v3_0.c1342 u32 sdma_cntl; in sdma_v3_0_set_trap_irq_state() local
1348 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v3_0_set_trap_irq_state()
1349 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1350 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v3_0_set_trap_irq_state()
1353 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v3_0_set_trap_irq_state()
1354 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
1355 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v3_0_set_trap_irq_state()
1364 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET); in sdma_v3_0_set_trap_irq_state()
1365 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1366 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl); in sdma_v3_0_set_trap_irq_state()
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Dcik_sdma.c1113 u32 sdma_cntl; in cik_sdma_set_trap_irq_state() local
1119 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1120 sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
1121 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
1124 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1125 sdma_cntl |= SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
1126 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
1135 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1136 sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
1137 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
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Dsdma_v6_0.c1422 u32 sdma_cntl; in sdma_v6_0_set_trap_irq_state() local
1426 sdma_cntl = RREG32(reg_offset); in sdma_v6_0_set_trap_irq_state()
1427 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v6_0_set_trap_irq_state()
1429 WREG32(reg_offset, sdma_cntl); in sdma_v6_0_set_trap_irq_state()
Dsdma_v5_2.c1462 u32 sdma_cntl; in sdma_v5_2_set_trap_irq_state() local
1466 sdma_cntl = RREG32(reg_offset); in sdma_v5_2_set_trap_irq_state()
1467 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v5_2_set_trap_irq_state()
1469 WREG32(reg_offset, sdma_cntl); in sdma_v5_2_set_trap_irq_state()
Dsdma_v5_0.c1576 u32 sdma_cntl; in sdma_v5_0_set_trap_irq_state() local
1583 sdma_cntl = RREG32(reg_offset); in sdma_v5_0_set_trap_irq_state()
1584 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v5_0_set_trap_irq_state()
1586 WREG32(reg_offset, sdma_cntl); in sdma_v5_0_set_trap_irq_state()
Dsdma_v4_0.c2032 u32 sdma_cntl; in sdma_v4_0_set_trap_irq_state() local
2034 sdma_cntl = RREG32_SDMA(type, mmSDMA0_CNTL); in sdma_v4_0_set_trap_irq_state()
2035 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v4_0_set_trap_irq_state()
2037 WREG32_SDMA(type, mmSDMA0_CNTL, sdma_cntl); in sdma_v4_0_set_trap_irq_state()