| /Linux-v6.1/drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_reg.h | 37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument 39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument 41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument 47 #define FN(reg_name, field) FD(reg_name##__##field) argument 58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument 59 dmub_reg_set(CTX, REG(reg_name), initial_val, n, __VA_ARGS__) 61 #define REG_SET(reg_name, initial_val, field, val) \ argument 62 REG_SET_N(reg_name, 1, initial_val, \ 63 FN(reg_name, field), val) 85 #define REG_UPDATE_N(reg_name, n, ...)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/inc/ |
| D | reg_helper.h | 39 #define REG_READ(reg_name) \ argument 40 dm_read_reg(CTX, REG(reg_name)) 42 #define REG_WRITE(reg_name, value) \ argument 43 dm_write_reg(CTX, REG(reg_name), value) 54 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument 56 REG(reg_name), \ 60 #define FN(reg_name, field) \ argument 61 FD(reg_name##__##field) 63 #define REG_SET(reg_name, initial_val, field, val) \ argument 64 REG_SET_N(reg_name, 1, initial_val, \ [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/ |
| D | dm_services.h | 95 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument 98 reg_name ## __ ## reg_field ## _MASK,\ 99 reg_name ## __ ## reg_field ## __SHIFT) 111 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument 115 reg_name ## __ ## reg_field ## _MASK,\ 116 reg_name ## __ ## reg_field ## __SHIFT) 156 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ argument 157 …generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name +… 160 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument 161 …generic_reg_set_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + ins… [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| D | hw_factory_dcn21.c | 57 #define REG(reg_name)\ argument 58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 60 #define SF_HPD(reg_name, field_name, post_fix)\ argument 61 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 63 #define REGI(reg_name, block, id)\ argument 64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 65 mm ## block ## id ## _ ## reg_name 67 #define SF(reg_name, field_name, post_fix)\ argument 68 .field_name = reg_name ## __ ## field_name ## post_fix 99 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_factory_dce120.c | 46 #define SF_HPD(reg_name, field_name, post_fix)\ argument 47 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 50 #define SF_HPD(reg_name, field_name, post_fix)\ argument 51 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 60 #define REG(reg_name)\ argument 61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 63 #define REGI(reg_name, block, id)\ argument 64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 65 mm ## block ## id ## _ ## reg_name 96 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_factory_dcn20.c | 59 #define REG(reg_name)\ argument 60 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 62 #define SF_HPD(reg_name, field_name, post_fix)\ argument 63 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 65 #define REGI(reg_name, block, id)\ argument 66 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 67 mm ## block ## id ## _ ## reg_name 69 #define SF(reg_name, field_name, post_fix)\ argument 70 .field_name = reg_name ## __ ## field_name ## post_fix 102 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dcn32/ |
| D | hw_factory_dcn32.c | 59 #define REG(reg_name)\ argument 60 BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name 62 #define SF_HPD(reg_name, field_name, post_fix)\ argument 63 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 65 #define REGI(reg_name, block, id)\ argument 66 BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 67 reg ## block ## id ## _ ## reg_name 69 #define SF(reg_name, field_name, post_fix)\ argument 70 .field_name = reg_name ## __ ## field_name ## post_fix 101 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| D | hw_factory_dcn30.c | 66 #define REG(reg_name)\ argument 67 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 69 #define SF_HPD(reg_name, field_name, post_fix)\ argument 70 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 72 #define REGI(reg_name, block, id)\ argument 73 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 74 mm ## block ## id ## _ ## reg_name 76 #define SF(reg_name, field_name, post_fix)\ argument 77 .field_name = reg_name ## __ ## field_name ## post_fix 109 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dcn315/ |
| D | hw_factory_dcn315.c | 63 #define REG(reg_name)\ argument 64 BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name 66 #define SF_HPD(reg_name, field_name, post_fix)\ argument 67 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 69 #define REGI(reg_name, block, id)\ argument 70 BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 71 reg ## block ## id ## _ ## reg_name 73 #define SF(reg_name, field_name, post_fix)\ argument 74 .field_name = reg_name ## __ ## field_name ## post_fix 105 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_factory_dcn10.c | 47 #define SF_HPD(reg_name, field_name, post_fix)\ argument 48 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 57 #define REG(reg_name)\ argument 58 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 60 #define REGI(reg_name, block, id)\ argument 61 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 62 mm ## block ## id ## _ ## reg_name 92 #define SF_DDC(reg_name, field_name, post_fix)\ argument 93 .field_name = reg_name ## __ ## field_name ## post_fix 128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/crypto/ux500/cryp/ |
| D | cryp_p.h | 23 #define CRYP_SET_BITS(reg_name, mask) \ argument 24 writel_relaxed((readl_relaxed(reg_name) | mask), reg_name) 26 #define CRYP_WRITE_BIT(reg_name, val, mask) \ argument 27 writel_relaxed(((readl_relaxed(reg_name) & ~(mask)) |\ 28 ((val) & (mask))), reg_name) 30 #define CRYP_TEST_BITS(reg_name, val) \ argument 31 (readl_relaxed(reg_name) & (val))
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_panel_cntl.h | 32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument 33 .reg_name = mm ## block ## _ ## reg_name 45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument 46 .reg_name = BASE(mm ## block ## _ ## reg_name ## _BASE_IDX) + \ 47 mm ## block ## _ ## reg_name 59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument 60 .field_name = reg_name ## __ ## field_name ## post_fix
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn321/ |
| D | dcn321_resource.c | 118 #define SR(reg_name)\ argument 119 REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ 120 reg ## reg_name 121 #define SR_ARR(reg_name, id)\ argument 122 REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ 123 reg ## reg_name 124 #define SR_ARR_INIT(reg_name, id, value)\ argument 125 REG_STRUCT[id].reg_name = value 127 #define SRI(reg_name, block, id)\ argument 128 REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| D | hw_factory_dce110.c | 42 #define SF_HPD(reg_name, field_name, post_fix)\ argument 43 .field_name = reg_name ## __ ## field_name ## post_fix 45 #define REG(reg_name)\ argument 46 mm ## reg_name 48 #define REGI(reg_name, block, id)\ argument 49 mm ## block ## id ## _ ## reg_name 79 #define SF_DDC(reg_name, field_name, post_fix)\ argument 80 .field_name = reg_name ## __ ## field_name ## post_fix
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn301/ |
| D | dcn301_resource.c | 116 #define SR(reg_name)\ argument 117 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 118 mm ## reg_name 120 #define SRI(reg_name, block, id)\ argument 121 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 122 mm ## block ## id ## _ ## reg_name 124 #define SRI2(reg_name, block, id)\ argument 125 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 126 mm ## reg_name 128 #define SRIR(var_name, reg_name, block, id)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_resource.c | 115 #define SR(reg_name)\ argument 116 REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ 117 reg ## reg_name 118 #define SR_ARR(reg_name, id) \ argument 119 REG_STRUCT[id].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name 121 #define SR_ARR_INIT(reg_name, id, value) \ argument 122 REG_STRUCT[id].reg_name = value 124 #define SRI(reg_name, block, id)\ argument 125 REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 126 reg ## block ## id ## _ ## reg_name [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dwb.h | 36 #define SR(reg_name)\ argument 37 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 38 mm ## reg_name 40 #define SRI(reg_name, block, id)\ argument 41 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 42 mm ## block ## id ## _ ## reg_name 45 #define SRII(reg_name, block, id)\ argument 46 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 47 mm ## block ## id ## _ ## reg_name 49 #define SF(reg_name, field_name, post_fix)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr_clk.c | 43 #define CLK_REG(reg_name, block, inst)\ argument 44 CLK_BASE(mm ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \ 45 mm ## block ## _ ## inst ## _ ## reg_name 47 #define REG(reg_name) \ argument 48 CLK_REG(reg_name, CLK0, 0)
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| /Linux-v6.1/tools/perf/util/ |
| D | perf_regs.c | 669 const char *reg_name = NULL; in perf_reg_name() local 672 reg_name = __perf_reg_name_csky(id); in perf_reg_name() 674 reg_name = __perf_reg_name_mips(id); in perf_reg_name() 676 reg_name = __perf_reg_name_powerpc(id); in perf_reg_name() 678 reg_name = __perf_reg_name_riscv(id); in perf_reg_name() 680 reg_name = __perf_reg_name_s390(id); in perf_reg_name() 682 reg_name = __perf_reg_name_x86(id); in perf_reg_name() 684 reg_name = __perf_reg_name_arm(id); in perf_reg_name() 686 reg_name = __perf_reg_name_arm64(id); in perf_reg_name() 688 return reg_name ?: "unknown"; in perf_reg_name()
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_resource.c | 251 #define SR(reg_name)\ argument 252 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 253 mm ## reg_name 255 #define SRI(reg_name, block, id)\ argument 256 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 257 mm ## block ## id ## _ ## reg_name 259 #define SRIR(var_name, reg_name, block, id)\ argument 260 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 261 mm ## block ## id ## _ ## reg_name 263 #define SRII(reg_name, block, id)\ argument [all …]
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| /Linux-v6.1/tools/lib/bpf/ |
| D | usdt.c | 1181 static int calc_pt_regs_off(const char *reg_name) in calc_pt_regs_off() argument 1217 if (strcmp(reg_name, reg_map[i].names[j]) == 0) in calc_pt_regs_off() 1222 pr_warn("usdt: unrecognized register '%s'\n", reg_name); in calc_pt_regs_off() 1228 char *reg_name = NULL; in parse_usdt_arg() local 1232 if (sscanf(arg_str, " %d @ %ld ( %%%m[^)] ) %n", &arg_sz, &off, ®_name, &len) == 3) { in parse_usdt_arg() 1236 reg_off = calc_pt_regs_off(reg_name); in parse_usdt_arg() 1237 free(reg_name); in parse_usdt_arg() 1241 } else if (sscanf(arg_str, " %d @ %%%ms %n", &arg_sz, ®_name, &len) == 2) { in parse_usdt_arg() 1246 reg_off = calc_pt_regs_off(reg_name); in parse_usdt_arg() 1247 free(reg_name); in parse_usdt_arg() [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dwb.h | 37 #define SR(reg_name)\ argument 38 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 39 mm ## reg_name 41 #define SRI(reg_name, block, id)\ argument 42 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 43 mm ## block ## id ## _ ## reg_name 45 #define SRI2(reg_name, block, id)\ argument 46 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 47 mm ## reg_name 49 #define SRII(reg_name, block, id)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn302/ |
| D | dcn302_resource.c | 175 #define NBIO_SR(reg_name)\ argument 176 .reg_name = NBIO_BASE(mm ## reg_name ## _BASE_IDX) + \ 177 mm ## reg_name 185 #define SR(reg_name)\ argument 186 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 188 #define SF(reg_name, field_name, post_fix)\ argument 189 .field_name = reg_name ## __ ## field_name ## post_fix 191 #define SRI(reg_name, block, id)\ argument 192 ….reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_… 194 #define SRI2(reg_name, block, id)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn303/ |
| D | dcn303_resource.c | 154 #define NBIO_SR(reg_name)\ argument 155 .reg_name = NBIO_BASE(mm ## reg_name ## _BASE_IDX) + \ 156 mm ## reg_name 164 #define SR(reg_name)\ argument 165 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 167 #define SF(reg_name, field_name, post_fix)\ argument 168 .field_name = reg_name ## __ ## field_name ## post_fix 170 #define SRI(reg_name, block, id)\ argument 171 ….reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_… 173 #define SRI2(reg_name, block, id)\ argument [all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| D | dcn315_smu.c | 64 #define REG(reg_name) \ argument 65 (MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name) 67 #define FN(reg_name, field) \ argument 68 FD(reg_name##__##field) 70 #define REG_NBIO(reg_name) \ argument 71 …(NBIO_BASE.instance[0].segment[regBIF_BX_PF2_ ## reg_name ## _BASE_IDX] + regBIF_BX_PF2_ ## reg_na…
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