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Searched refs:regUVD_CGC_CTRL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c642 data = RREG32_SOC15(VCN, inst, regUVD_CGC_CTRL); in vcn_v4_0_disable_clock_gating()
646 WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data); in vcn_v4_0_disable_clock_gating()
673 data = RREG32_SOC15(VCN, inst, regUVD_CGC_CTRL); in vcn_v4_0_disable_clock_gating()
694 WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data); in vcn_v4_0_disable_clock_gating()
779 VCN, inst_idx, regUVD_CGC_CTRL), reg_data, sram_sel, indirect); in vcn_v4_0_disable_clock_gating_dpg_mode()
810 data = RREG32_SOC15(VCN, inst, regUVD_CGC_CTRL); in vcn_v4_0_enable_clock_gating()
814 WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data); in vcn_v4_0_enable_clock_gating()
816 data = RREG32_SOC15(VCN, inst, regUVD_CGC_CTRL); in vcn_v4_0_enable_clock_gating()
837 WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data); in vcn_v4_0_enable_clock_gating()
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h1248 #define regUVD_CGC_CTRL … macro
Dvcn_4_0_0_offset.h34 #define regUVD_CGC_CTRL … macro