Home
last modified time | relevance | path

Searched refs:regSDMA0_UTCL1_WR_STATUS_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_offset.h112 #define regSDMA0_UTCL1_WR_STATUS_BASE_IDX … macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_3_offset.h109 #define regSDMA0_UTCL1_WR_STATUS_BASE_IDX … macro
Dgc_11_0_0_offset.h109 #define regSDMA0_UTCL1_WR_STATUS_BASE_IDX … macro