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Searched refs:regMP1_SMN_IH_SW_INT (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_13_0_2_offset.h385 #define regMP1_SMN_IH_SW_INT … macro
Dmp_13_0_4_offset.h378 #define regMP1_SMN_IH_SW_INT … macro
Dmp_13_0_8_offset.h380 #define regMP1_SMN_IH_SW_INT … macro
Dmp_13_0_0_offset.h377 #define regMP1_SMN_IH_SW_INT … macro
Dmp_13_0_5_offset.h379 #define regMP1_SMN_IH_SW_INT … macro
/Linux-v6.1/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0.c1338 val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT); in smu_v13_0_set_irq_state()
1341 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val); in smu_v13_0_set_irq_state()