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Searched refs:regCP_MEC_DC_BASE_CNTL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c2327 tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL); in gfx_v11_0_config_mec_cache_rs64()
2330 WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp); in gfx_v11_0_config_mec_cache_rs64()
3410 tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL); in gfx_v11_0_cp_compute_load_microcode_rs64()
3413 WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp); in gfx_v11_0_cp_compute_load_microcode_rs64()
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_3_offset.h8072 #define regCP_MEC_DC_BASE_CNTL … macro
Dgc_11_0_0_offset.h7764 #define regCP_MEC_DC_BASE_CNTL … macro