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Searched refs:regCP_GFX_RS64_DC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c2168 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_config_pfp_cache_rs64()
2170 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp); in gfx_v11_0_config_pfp_cache_rs64()
2173 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_config_pfp_cache_rs64()
2291 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_config_me_cache_rs64()
2293 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp); in gfx_v11_0_config_me_cache_rs64()
2296 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_config_me_cache_rs64()
2768 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()
2770 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp); in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()
2773 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()
2983 tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL); in gfx_v11_0_cp_gfx_load_me_microcode_rs64()
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/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_offset.h7984 #define regCP_GFX_RS64_DC_OP_CNTL … macro
Dgc_11_0_3_offset.h8292 #define regCP_GFX_RS64_DC_OP_CNTL … macro