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Searched refs:regCP_CPC_IC_BASE_CNTL (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c2051 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL); in gfx_v11_0_config_mec_cache()
2055 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp); in gfx_v11_0_config_mec_cache()
2321 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL); in gfx_v11_0_config_mec_cache_rs64()
2325 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp); in gfx_v11_0_config_mec_cache_rs64()
3404 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL); in gfx_v11_0_cp_compute_load_microcode_rs64()
3408 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp); in gfx_v11_0_cp_compute_load_microcode_rs64()
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h585 #define regCP_CPC_IC_BASE_CNTL … macro
Dgc_11_0_3_offset.h10282 #define regCP_CPC_IC_BASE_CNTL … macro
Dgc_11_0_0_offset.h9728 #define regCP_CPC_IC_BASE_CNTL … macro