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Searched refs:regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h14940 #define regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE … macro
Ddcn_3_1_5_offset.h7822 #define regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE … macro
Ddcn_3_1_2_offset.h8059 #define regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE … macro
Ddcn_3_2_0_offset.h7209 #define regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE … macro
Ddcn_3_2_1_offset.h7208 #define regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE … macro
Ddcn_3_1_6_offset.h8283 #define regABM2_BL1_PWM_MINIMUM_DUTY_CYCLE … macro