Searched refs:pp_feature (Results 1 – 18 of 18) sorted by relevance
99 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in hwmgr_early_init()110 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in hwmgr_early_init()117 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in hwmgr_early_init()159 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in hwmgr_early_init()169 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
352 if (adev->pm.pp_feature & PP_GFXOFF_MASK) { in smu10_disable_gfx_off()372 if (adev->pm.pp_feature & PP_GFXOFF_MASK) in smu10_enable_gfx_off()
254 if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) { in smu_v13_0_7_get_allowed_feature_mask()260 if (adev->pm.pp_feature & PP_GFXOFF_MASK) in smu_v13_0_7_get_allowed_feature_mask()263 if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) { in smu_v13_0_7_get_allowed_feature_mask()272 if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) in smu_v13_0_7_get_allowed_feature_mask()275 if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) in smu_v13_0_7_get_allowed_feature_mask()278 if (adev->pm.pp_feature & PP_ULV_MASK) in smu_v13_0_7_get_allowed_feature_mask()301 if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) in smu_v13_0_7_get_allowed_feature_mask()
251 if (!(adev->pm.pp_feature & PP_SCLK_DPM_MASK)) { in smu_v13_0_0_get_allowed_feature_mask()260 if (!(adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)) in smu_v13_0_0_get_allowed_feature_mask()266 !(adev->pm.pp_feature & PP_GFXOFF_MASK)) in smu_v13_0_0_get_allowed_feature_mask()269 if (!(adev->pm.pp_feature & PP_MCLK_DPM_MASK)) { in smu_v13_0_0_get_allowed_feature_mask()275 if (!(adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK)) in smu_v13_0_0_get_allowed_feature_mask()278 if (!(adev->pm.pp_feature & PP_PCIE_DPM_MASK)) { in smu_v13_0_0_get_allowed_feature_mask()283 if (!(adev->pm.pp_feature & PP_ULV_MASK)) in smu_v13_0_0_get_allowed_feature_mask()
844 if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) in smu_v13_0_gfx_off_control()
309 if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) in navi10_get_allowed_feature_mask()312 if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) in navi10_get_allowed_feature_mask()315 if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) in navi10_get_allowed_feature_mask()318 if (adev->pm.pp_feature & PP_ULV_MASK) in navi10_get_allowed_feature_mask()321 if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) in navi10_get_allowed_feature_mask()324 if (adev->pm.pp_feature & PP_GFXOFF_MASK) in navi10_get_allowed_feature_mask()342 if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) in navi10_get_allowed_feature_mask()349 (adev->pm.pp_feature & PP_MCLK_DPM_MASK)) in navi10_get_allowed_feature_mask()450 if (adev->pm.pp_feature & PP_GFXOFF_MASK) { in navi10_append_powerplay_table()
306 if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) { in sienna_cichlid_get_allowed_feature_mask()311 if ((adev->pm.pp_feature & PP_GFX_DCS_MASK) && in sienna_cichlid_get_allowed_feature_mask()316 if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) in sienna_cichlid_get_allowed_feature_mask()321 if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) in sienna_cichlid_get_allowed_feature_mask()324 if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) in sienna_cichlid_get_allowed_feature_mask()327 if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) in sienna_cichlid_get_allowed_feature_mask()330 if (adev->pm.pp_feature & PP_ULV_MASK) in sienna_cichlid_get_allowed_feature_mask()333 if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) in sienna_cichlid_get_allowed_feature_mask()336 if (adev->pm.pp_feature & PP_GFXOFF_MASK) in sienna_cichlid_get_allowed_feature_mask()
2148 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in vangogh_post_smu_init()2359 if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) in vangogh_set_gfxoff_residency()2403 if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) in vangogh_get_gfxoff_entrycount()
1141 if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) in smu_v11_0_gfx_off_control()
231 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in smu10_start_smu()
344 uint32_t pp_feature; member
568 if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) in amdgpu_gfx_off_ctrl()
2147 adev->pm.pp_feature = amdgpu_pp_feature_mask; in amdgpu_device_ip_early_init()2149 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in amdgpu_device_ip_early_init()2151 adev->pm.pp_feature &= ~PP_OVERDRIVE_MASK; in amdgpu_device_ip_early_init()
1217 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in gfx_v9_0_check_if_need_gfxoff()1232 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in gfx_v9_0_check_if_need_gfxoff()1234 if (adev->pm.pp_feature & PP_GFXOFF_MASK) in gfx_v9_0_check_if_need_gfxoff()1240 if (adev->pm.pp_feature & PP_GFXOFF_MASK) in gfx_v9_0_check_if_need_gfxoff()
3968 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in gfx_v10_0_check_gfxoff_flag()
560 if (adev->pm.pp_feature & PP_OVERDRIVE_MASK) in smu_set_funcs()597 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; in smu_set_funcs()
56 hwmgr->feature_mask = adev->pm.pp_feature; in amd_powerplay_create()
2829 if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) in kv_dpm_init()
