1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2017-2019, Linaro Ltd.
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/string.h>
15 #include <linux/sys_soc.h>
16 #include <linux/types.h>
17
18 #include <asm/unaligned.h>
19
20 /*
21 * SoC version type with major number in the upper 16 bits and minor
22 * number in the lower 16 bits.
23 */
24 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
25 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
26 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
27
28 #define SMEM_SOCINFO_BUILD_ID_LENGTH 32
29 #define SMEM_SOCINFO_CHIP_ID_LENGTH 32
30
31 /*
32 * SMEM item id, used to acquire handles to respective
33 * SMEM region.
34 */
35 #define SMEM_HW_SW_BUILD_ID 137
36
37 #ifdef CONFIG_DEBUG_FS
38 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
39 #define SMEM_IMAGE_VERSION_SIZE 4096
40 #define SMEM_IMAGE_VERSION_NAME_SIZE 75
41 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20
42 #define SMEM_IMAGE_VERSION_OEM_SIZE 32
43
44 /*
45 * SMEM Image table indices
46 */
47 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0
48 #define SMEM_IMAGE_TABLE_TZ_INDEX 1
49 #define SMEM_IMAGE_TABLE_RPM_INDEX 3
50 #define SMEM_IMAGE_TABLE_APPS_INDEX 10
51 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11
52 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12
53 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13
54 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14
55 #define SMEM_IMAGE_VERSION_TABLE 469
56
57 /*
58 * SMEM Image table names
59 */
60 static const char *const socinfo_image_names[] = {
61 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
62 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
63 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
64 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
65 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
66 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
67 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
68 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
69 };
70
71 static const char *const pmic_models[] = {
72 [0] = "Unknown PMIC model",
73 [1] = "PM8941",
74 [2] = "PM8841",
75 [3] = "PM8019",
76 [4] = "PM8226",
77 [5] = "PM8110",
78 [6] = "PMA8084",
79 [7] = "PMI8962",
80 [8] = "PMD9635",
81 [9] = "PM8994",
82 [10] = "PMI8994",
83 [11] = "PM8916",
84 [12] = "PM8004",
85 [13] = "PM8909/PM8058",
86 [14] = "PM8028",
87 [15] = "PM8901",
88 [16] = "PM8950/PM8027",
89 [17] = "PMI8950/ISL9519",
90 [18] = "PMK8001/PM8921",
91 [19] = "PMI8996/PM8018",
92 [20] = "PM8998/PM8015",
93 [21] = "PMI8998/PM8014",
94 [22] = "PM8821",
95 [23] = "PM8038",
96 [24] = "PM8005/PM8922",
97 [25] = "PM8917",
98 [26] = "PM660L",
99 [27] = "PM660",
100 [30] = "PM8150",
101 [31] = "PM8150L",
102 [32] = "PM8150B",
103 [33] = "PMK8002",
104 [36] = "PM8009",
105 [38] = "PM8150C",
106 [41] = "SMB2351",
107 [45] = "PM6125",
108 [47] = "PMK8350",
109 [48] = "PM8350",
110 [49] = "PM8350C",
111 [50] = "PM8350B",
112 [51] = "PMR735A",
113 [52] = "PMR735B",
114 [58] = "PM8450",
115 [65] = "PM8010",
116 };
117 #endif /* CONFIG_DEBUG_FS */
118
119 /* Socinfo SMEM item structure */
120 struct socinfo {
121 __le32 fmt;
122 __le32 id;
123 __le32 ver;
124 char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
125 /* Version 2 */
126 __le32 raw_id;
127 __le32 raw_ver;
128 /* Version 3 */
129 __le32 hw_plat;
130 /* Version 4 */
131 __le32 plat_ver;
132 /* Version 5 */
133 __le32 accessory_chip;
134 /* Version 6 */
135 __le32 hw_plat_subtype;
136 /* Version 7 */
137 __le32 pmic_model;
138 __le32 pmic_die_rev;
139 /* Version 8 */
140 __le32 pmic_model_1;
141 __le32 pmic_die_rev_1;
142 __le32 pmic_model_2;
143 __le32 pmic_die_rev_2;
144 /* Version 9 */
145 __le32 foundry_id;
146 /* Version 10 */
147 __le32 serial_num;
148 /* Version 11 */
149 __le32 num_pmics;
150 __le32 pmic_array_offset;
151 /* Version 12 */
152 __le32 chip_family;
153 __le32 raw_device_family;
154 __le32 raw_device_num;
155 /* Version 13 */
156 __le32 nproduct_id;
157 char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
158 /* Version 14 */
159 __le32 num_clusters;
160 __le32 ncluster_array_offset;
161 __le32 num_defective_parts;
162 __le32 ndefective_parts_array_offset;
163 /* Version 15 */
164 __le32 nmodem_supported;
165 };
166
167 #ifdef CONFIG_DEBUG_FS
168 struct socinfo_params {
169 u32 raw_device_family;
170 u32 hw_plat_subtype;
171 u32 accessory_chip;
172 u32 raw_device_num;
173 u32 chip_family;
174 u32 foundry_id;
175 u32 plat_ver;
176 u32 raw_ver;
177 u32 hw_plat;
178 u32 fmt;
179 u32 nproduct_id;
180 u32 num_clusters;
181 u32 ncluster_array_offset;
182 u32 num_defective_parts;
183 u32 ndefective_parts_array_offset;
184 u32 nmodem_supported;
185 };
186
187 struct smem_image_version {
188 char name[SMEM_IMAGE_VERSION_NAME_SIZE];
189 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
190 char pad;
191 char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
192 };
193 #endif /* CONFIG_DEBUG_FS */
194
195 struct qcom_socinfo {
196 struct soc_device *soc_dev;
197 struct soc_device_attribute attr;
198 #ifdef CONFIG_DEBUG_FS
199 struct dentry *dbg_root;
200 struct socinfo_params info;
201 #endif /* CONFIG_DEBUG_FS */
202 };
203
204 struct soc_id {
205 unsigned int id;
206 const char *name;
207 };
208
209 static const struct soc_id soc_id[] = {
210 { 87, "MSM8960" },
211 { 109, "APQ8064" },
212 { 122, "MSM8660A" },
213 { 123, "MSM8260A" },
214 { 124, "APQ8060A" },
215 { 126, "MSM8974" },
216 { 130, "MPQ8064" },
217 { 138, "MSM8960AB" },
218 { 139, "APQ8060AB" },
219 { 140, "MSM8260AB" },
220 { 141, "MSM8660AB" },
221 { 145, "MSM8626" },
222 { 147, "MSM8610" },
223 { 153, "APQ8064AB" },
224 { 158, "MSM8226" },
225 { 159, "MSM8526" },
226 { 161, "MSM8110" },
227 { 162, "MSM8210" },
228 { 163, "MSM8810" },
229 { 164, "MSM8212" },
230 { 165, "MSM8612" },
231 { 166, "MSM8112" },
232 { 168, "MSM8225Q" },
233 { 169, "MSM8625Q" },
234 { 170, "MSM8125Q" },
235 { 172, "APQ8064AA" },
236 { 178, "APQ8084" },
237 { 184, "APQ8074" },
238 { 185, "MSM8274" },
239 { 186, "MSM8674" },
240 { 194, "MSM8974PRO-AC" },
241 { 198, "MSM8126" },
242 { 199, "APQ8026" },
243 { 200, "MSM8926" },
244 { 205, "MSM8326" },
245 { 206, "MSM8916" },
246 { 207, "MSM8994" },
247 { 208, "APQ8074PRO-AA" },
248 { 209, "APQ8074PRO-AB" },
249 { 210, "APQ8074PRO-AC" },
250 { 211, "MSM8274PRO-AA" },
251 { 212, "MSM8274PRO-AB" },
252 { 213, "MSM8274PRO-AC" },
253 { 214, "MSM8674PRO-AA" },
254 { 215, "MSM8674PRO-AB" },
255 { 216, "MSM8674PRO-AC" },
256 { 217, "MSM8974PRO-AA" },
257 { 218, "MSM8974PRO-AB" },
258 { 219, "APQ8028" },
259 { 220, "MSM8128" },
260 { 221, "MSM8228" },
261 { 222, "MSM8528" },
262 { 223, "MSM8628" },
263 { 224, "MSM8928" },
264 { 225, "MSM8510" },
265 { 226, "MSM8512" },
266 { 233, "MSM8936" },
267 { 239, "MSM8939" },
268 { 240, "APQ8036" },
269 { 241, "APQ8039" },
270 { 246, "MSM8996" },
271 { 247, "APQ8016" },
272 { 248, "MSM8216" },
273 { 249, "MSM8116" },
274 { 250, "MSM8616" },
275 { 251, "MSM8992" },
276 { 253, "APQ8094" },
277 { 290, "MDM9607" },
278 { 291, "APQ8096" },
279 { 292, "MSM8998" },
280 { 293, "MSM8953" },
281 { 296, "MDM8207" },
282 { 297, "MDM9207" },
283 { 298, "MDM9307" },
284 { 299, "MDM9628" },
285 { 304, "APQ8053" },
286 { 305, "MSM8996SG" },
287 { 310, "MSM8996AU" },
288 { 311, "APQ8096AU" },
289 { 312, "APQ8096SG" },
290 { 317, "SDM660" },
291 { 318, "SDM630" },
292 { 319, "APQ8098" },
293 { 321, "SDM845" },
294 { 322, "MDM9206" },
295 { 323, "IPQ8074" },
296 { 324, "SDA660" },
297 { 325, "SDM658" },
298 { 326, "SDA658" },
299 { 327, "SDA630" },
300 { 338, "SDM450" },
301 { 341, "SDA845" },
302 { 342, "IPQ8072" },
303 { 343, "IPQ8076" },
304 { 344, "IPQ8078" },
305 { 345, "SDM636" },
306 { 346, "SDA636" },
307 { 349, "SDM632" },
308 { 350, "SDA632" },
309 { 351, "SDA450" },
310 { 356, "SM8250" },
311 { 375, "IPQ8070" },
312 { 376, "IPQ8071" },
313 { 389, "IPQ8072A" },
314 { 390, "IPQ8074A" },
315 { 391, "IPQ8076A" },
316 { 392, "IPQ8078A" },
317 { 394, "SM6125" },
318 { 395, "IPQ8070A" },
319 { 396, "IPQ8071A" },
320 { 402, "IPQ6018" },
321 { 403, "IPQ6028" },
322 { 421, "IPQ6000" },
323 { 422, "IPQ6010" },
324 { 425, "SC7180" },
325 { 434, "SM6350" },
326 { 439, "SM8350" },
327 { 449, "SC8280XP" },
328 { 453, "IPQ6005" },
329 { 455, "QRB5165" },
330 { 457, "SM8450" },
331 { 459, "SM7225" },
332 { 460, "SA8295P" },
333 { 461, "SA8540P" },
334 { 480, "SM8450" },
335 { 482, "SM8450" },
336 { 487, "SC7280" },
337 { 495, "SC7180P" },
338 { 507, "SM6375" },
339 };
340
socinfo_machine(struct device * dev,unsigned int id)341 static const char *socinfo_machine(struct device *dev, unsigned int id)
342 {
343 int idx;
344
345 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
346 if (soc_id[idx].id == id)
347 return soc_id[idx].name;
348 }
349
350 return NULL;
351 }
352
353 #ifdef CONFIG_DEBUG_FS
354
355 #define QCOM_OPEN(name, _func) \
356 static int qcom_open_##name(struct inode *inode, struct file *file) \
357 { \
358 return single_open(file, _func, inode->i_private); \
359 } \
360 \
361 static const struct file_operations qcom_ ##name## _ops = { \
362 .open = qcom_open_##name, \
363 .read = seq_read, \
364 .llseek = seq_lseek, \
365 .release = single_release, \
366 }
367
368 #define DEBUGFS_ADD(info, name) \
369 debugfs_create_file(__stringify(name), 0444, \
370 qcom_socinfo->dbg_root, \
371 info, &qcom_ ##name## _ops)
372
373
qcom_show_build_id(struct seq_file * seq,void * p)374 static int qcom_show_build_id(struct seq_file *seq, void *p)
375 {
376 struct socinfo *socinfo = seq->private;
377
378 seq_printf(seq, "%s\n", socinfo->build_id);
379
380 return 0;
381 }
382
qcom_show_pmic_model(struct seq_file * seq,void * p)383 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
384 {
385 struct socinfo *socinfo = seq->private;
386 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
387
388 if (model < 0)
389 return -EINVAL;
390
391 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
392 seq_printf(seq, "%s\n", pmic_models[model]);
393 else
394 seq_printf(seq, "unknown (%d)\n", model);
395
396 return 0;
397 }
398
qcom_show_pmic_model_array(struct seq_file * seq,void * p)399 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
400 {
401 struct socinfo *socinfo = seq->private;
402 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
403 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
404 int i;
405 void *ptr = socinfo;
406
407 ptr += pmic_array_offset;
408
409 /* No need for bounds checking, it happened at socinfo_debugfs_init */
410 for (i = 0; i < num_pmics; i++) {
411 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
412 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
413
414 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
415 seq_printf(seq, "%s %u.%u\n", pmic_models[model],
416 SOCINFO_MAJOR(die_rev),
417 SOCINFO_MINOR(die_rev));
418 else
419 seq_printf(seq, "unknown (%d)\n", model);
420 }
421
422 return 0;
423 }
424
qcom_show_pmic_die_revision(struct seq_file * seq,void * p)425 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
426 {
427 struct socinfo *socinfo = seq->private;
428
429 seq_printf(seq, "%u.%u\n",
430 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
431 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
432
433 return 0;
434 }
435
qcom_show_chip_id(struct seq_file * seq,void * p)436 static int qcom_show_chip_id(struct seq_file *seq, void *p)
437 {
438 struct socinfo *socinfo = seq->private;
439
440 seq_printf(seq, "%s\n", socinfo->chip_id);
441
442 return 0;
443 }
444
445 QCOM_OPEN(build_id, qcom_show_build_id);
446 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
447 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
448 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
449 QCOM_OPEN(chip_id, qcom_show_chip_id);
450
451 #define DEFINE_IMAGE_OPS(type) \
452 static int show_image_##type(struct seq_file *seq, void *p) \
453 { \
454 struct smem_image_version *image_version = seq->private; \
455 if (image_version->type[0] != '\0') \
456 seq_printf(seq, "%s\n", image_version->type); \
457 return 0; \
458 } \
459 static int open_image_##type(struct inode *inode, struct file *file) \
460 { \
461 return single_open(file, show_image_##type, inode->i_private); \
462 } \
463 \
464 static const struct file_operations qcom_image_##type##_ops = { \
465 .open = open_image_##type, \
466 .read = seq_read, \
467 .llseek = seq_lseek, \
468 .release = single_release, \
469 }
470
471 DEFINE_IMAGE_OPS(name);
472 DEFINE_IMAGE_OPS(variant);
473 DEFINE_IMAGE_OPS(oem);
474
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)475 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
476 struct socinfo *info, size_t info_size)
477 {
478 struct smem_image_version *versions;
479 struct dentry *dentry;
480 size_t size;
481 int i;
482 unsigned int num_pmics;
483 unsigned int pmic_array_offset;
484
485 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
486
487 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
488
489 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root,
490 &qcom_socinfo->info.fmt);
491
492 switch (qcom_socinfo->info.fmt) {
493 case SOCINFO_VERSION(0, 15):
494 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
495
496 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root,
497 &qcom_socinfo->info.nmodem_supported);
498 fallthrough;
499 case SOCINFO_VERSION(0, 14):
500 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
501 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
502 qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts);
503 qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset);
504
505 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root,
506 &qcom_socinfo->info.num_clusters);
507 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root,
508 &qcom_socinfo->info.ncluster_array_offset);
509 debugfs_create_u32("num_defective_parts", 0444, qcom_socinfo->dbg_root,
510 &qcom_socinfo->info.num_defective_parts);
511 debugfs_create_u32("ndefective_parts_array_offset", 0444, qcom_socinfo->dbg_root,
512 &qcom_socinfo->info.ndefective_parts_array_offset);
513 fallthrough;
514 case SOCINFO_VERSION(0, 13):
515 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
516
517 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root,
518 &qcom_socinfo->info.nproduct_id);
519 DEBUGFS_ADD(info, chip_id);
520 fallthrough;
521 case SOCINFO_VERSION(0, 12):
522 qcom_socinfo->info.chip_family =
523 __le32_to_cpu(info->chip_family);
524 qcom_socinfo->info.raw_device_family =
525 __le32_to_cpu(info->raw_device_family);
526 qcom_socinfo->info.raw_device_num =
527 __le32_to_cpu(info->raw_device_num);
528
529 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root,
530 &qcom_socinfo->info.chip_family);
531 debugfs_create_x32("raw_device_family", 0444,
532 qcom_socinfo->dbg_root,
533 &qcom_socinfo->info.raw_device_family);
534 debugfs_create_x32("raw_device_number", 0444,
535 qcom_socinfo->dbg_root,
536 &qcom_socinfo->info.raw_device_num);
537 fallthrough;
538 case SOCINFO_VERSION(0, 11):
539 num_pmics = le32_to_cpu(info->num_pmics);
540 pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
541 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
542 DEBUGFS_ADD(info, pmic_model_array);
543 fallthrough;
544 case SOCINFO_VERSION(0, 10):
545 case SOCINFO_VERSION(0, 9):
546 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
547
548 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root,
549 &qcom_socinfo->info.foundry_id);
550 fallthrough;
551 case SOCINFO_VERSION(0, 8):
552 case SOCINFO_VERSION(0, 7):
553 DEBUGFS_ADD(info, pmic_model);
554 DEBUGFS_ADD(info, pmic_die_rev);
555 fallthrough;
556 case SOCINFO_VERSION(0, 6):
557 qcom_socinfo->info.hw_plat_subtype =
558 __le32_to_cpu(info->hw_plat_subtype);
559
560 debugfs_create_u32("hardware_platform_subtype", 0444,
561 qcom_socinfo->dbg_root,
562 &qcom_socinfo->info.hw_plat_subtype);
563 fallthrough;
564 case SOCINFO_VERSION(0, 5):
565 qcom_socinfo->info.accessory_chip =
566 __le32_to_cpu(info->accessory_chip);
567
568 debugfs_create_u32("accessory_chip", 0444,
569 qcom_socinfo->dbg_root,
570 &qcom_socinfo->info.accessory_chip);
571 fallthrough;
572 case SOCINFO_VERSION(0, 4):
573 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
574
575 debugfs_create_u32("platform_version", 0444,
576 qcom_socinfo->dbg_root,
577 &qcom_socinfo->info.plat_ver);
578 fallthrough;
579 case SOCINFO_VERSION(0, 3):
580 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
581
582 debugfs_create_u32("hardware_platform", 0444,
583 qcom_socinfo->dbg_root,
584 &qcom_socinfo->info.hw_plat);
585 fallthrough;
586 case SOCINFO_VERSION(0, 2):
587 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver);
588
589 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root,
590 &qcom_socinfo->info.raw_ver);
591 fallthrough;
592 case SOCINFO_VERSION(0, 1):
593 DEBUGFS_ADD(info, build_id);
594 break;
595 }
596
597 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
598 &size);
599
600 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
601 if (!socinfo_image_names[i])
602 continue;
603
604 dentry = debugfs_create_dir(socinfo_image_names[i],
605 qcom_socinfo->dbg_root);
606 debugfs_create_file("name", 0444, dentry, &versions[i],
607 &qcom_image_name_ops);
608 debugfs_create_file("variant", 0444, dentry, &versions[i],
609 &qcom_image_variant_ops);
610 debugfs_create_file("oem", 0444, dentry, &versions[i],
611 &qcom_image_oem_ops);
612 }
613 }
614
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)615 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
616 {
617 debugfs_remove_recursive(qcom_socinfo->dbg_root);
618 }
619 #else
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)620 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
621 struct socinfo *info, size_t info_size)
622 {
623 }
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)624 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { }
625 #endif /* CONFIG_DEBUG_FS */
626
qcom_socinfo_probe(struct platform_device * pdev)627 static int qcom_socinfo_probe(struct platform_device *pdev)
628 {
629 struct qcom_socinfo *qs;
630 struct socinfo *info;
631 size_t item_size;
632
633 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
634 &item_size);
635 if (IS_ERR(info)) {
636 dev_err(&pdev->dev, "Couldn't find socinfo\n");
637 return PTR_ERR(info);
638 }
639
640 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
641 if (!qs)
642 return -ENOMEM;
643
644 qs->attr.family = "Snapdragon";
645 qs->attr.machine = socinfo_machine(&pdev->dev,
646 le32_to_cpu(info->id));
647 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
648 le32_to_cpu(info->id));
649 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
650 SOCINFO_MAJOR(le32_to_cpu(info->ver)),
651 SOCINFO_MINOR(le32_to_cpu(info->ver)));
652 if (offsetof(struct socinfo, serial_num) <= item_size)
653 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
654 "%u",
655 le32_to_cpu(info->serial_num));
656
657 qs->soc_dev = soc_device_register(&qs->attr);
658 if (IS_ERR(qs->soc_dev))
659 return PTR_ERR(qs->soc_dev);
660
661 socinfo_debugfs_init(qs, info, item_size);
662
663 /* Feed the soc specific unique data into entropy pool */
664 add_device_randomness(info, item_size);
665
666 platform_set_drvdata(pdev, qs);
667
668 return 0;
669 }
670
qcom_socinfo_remove(struct platform_device * pdev)671 static int qcom_socinfo_remove(struct platform_device *pdev)
672 {
673 struct qcom_socinfo *qs = platform_get_drvdata(pdev);
674
675 soc_device_unregister(qs->soc_dev);
676
677 socinfo_debugfs_exit(qs);
678
679 return 0;
680 }
681
682 static struct platform_driver qcom_socinfo_driver = {
683 .probe = qcom_socinfo_probe,
684 .remove = qcom_socinfo_remove,
685 .driver = {
686 .name = "qcom-socinfo",
687 },
688 };
689
690 module_platform_driver(qcom_socinfo_driver);
691
692 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
693 MODULE_LICENSE("GPL v2");
694 MODULE_ALIAS("platform:qcom-socinfo");
695
