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Searched refs:pll_out_div (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_10nm.c65 u8 pll_out_div; member
491 cached->pll_out_div = dsi_phy_read(pll_10nm->phy->pll_base + in dsi_10nm_pll_save_state()
493 cached->pll_out_div &= 0x3; in dsi_10nm_pll_save_state()
503 pll_10nm->phy->id, cached->pll_out_div, cached->bit_clk_div, in dsi_10nm_pll_save_state()
517 val |= cached->pll_out_div; in dsi_10nm_pll_restore_state()
588 struct clk_hw *hw, *pll_out_div, *pll_bit, *pll_by_2_bit; in pll_10nm_register() local
603 pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_10nm_register()
608 if (IS_ERR(pll_out_div)) { in pll_10nm_register()
609 ret = PTR_ERR(pll_out_div); in pll_10nm_register()
617 pll_out_div, CLK_SET_RATE_PARENT, in pll_10nm_register()
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Ddsi_phy_7nm.c64 u8 pll_out_div; member
505 cached->pll_out_div = dsi_phy_read(pll_7nm->phy->pll_base + in dsi_7nm_pll_save_state()
507 cached->pll_out_div &= 0x3; in dsi_7nm_pll_save_state()
517 pll_7nm->phy->id, cached->pll_out_div, cached->bit_clk_div, in dsi_7nm_pll_save_state()
531 val |= cached->pll_out_div; in dsi_7nm_pll_restore_state()
602 struct clk_hw *hw, *pll_out_div, *pll_bit, *pll_by_2_bit; in pll_7nm_register() local
617 pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_7nm_register()
622 if (IS_ERR(pll_out_div)) { in pll_7nm_register()
623 ret = PTR_ERR(pll_out_div); in pll_7nm_register()
631 pll_out_div, CLK_SET_RATE_PARENT, in pll_7nm_register()
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