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Searched refs:phys_enc (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_encoder_phys_cmd.c43 static bool dpu_encoder_phys_cmd_is_master(struct dpu_encoder_phys *phys_enc) in dpu_encoder_phys_cmd_is_master() argument
45 return (phys_enc->split_role != ENC_ROLE_SLAVE); in dpu_encoder_phys_cmd_is_master()
49 struct dpu_encoder_phys *phys_enc) in _dpu_encoder_phys_cmd_update_intf_cfg() argument
52 to_dpu_encoder_phys_cmd(phys_enc); in _dpu_encoder_phys_cmd_update_intf_cfg()
56 ctl = phys_enc->hw_ctl; in _dpu_encoder_phys_cmd_update_intf_cfg()
60 intf_cfg.intf = phys_enc->intf_idx; in _dpu_encoder_phys_cmd_update_intf_cfg()
63 intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); in _dpu_encoder_phys_cmd_update_intf_cfg()
67 if (test_bit(DPU_CTL_ACTIVE_CFG, &ctl->caps->features) && phys_enc->hw_intf->ops.bind_pingpong_blk) in _dpu_encoder_phys_cmd_update_intf_cfg()
68 phys_enc->hw_intf->ops.bind_pingpong_blk( in _dpu_encoder_phys_cmd_update_intf_cfg()
69 phys_enc->hw_intf, in _dpu_encoder_phys_cmd_update_intf_cfg()
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Ddpu_encoder_phys_vid.c30 struct dpu_encoder_phys *phys_enc) in dpu_encoder_phys_vid_is_master() argument
34 if (phys_enc->split_role != ENC_ROLE_SLAVE) in dpu_encoder_phys_vid_is_master()
41 const struct dpu_encoder_phys *phys_enc, in drm_mode_to_intf_timing_params() argument
89 if (phys_enc->hw_intf->cap->type == INTF_DSI) { in drm_mode_to_intf_timing_params()
95 if (phys_enc->hw_intf->cap->type == INTF_DP) { in drm_mode_to_intf_timing_params()
102 timing->wide_bus_en = dpu_encoder_is_widebus_enabled(phys_enc->parent); in drm_mode_to_intf_timing_params()
108 if (phys_enc->hw_intf->cap->type == INTF_DP && timing->wide_bus_en) { in drm_mode_to_intf_timing_params()
150 struct dpu_encoder_phys *phys_enc, in programmable_fetch_get_num_lines() argument
154 phys_enc->hw_intf->cap->prog_fetch_lines_worst_case; in programmable_fetch_get_num_lines()
162 DPU_DEBUG_VIDENC(phys_enc, in programmable_fetch_get_num_lines()
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Ddpu_encoder_phys_wb.c30 static bool dpu_encoder_phys_wb_is_master(struct dpu_encoder_phys *phys_enc) in dpu_encoder_phys_wb_is_master() argument
41 struct dpu_encoder_phys *phys_enc) in dpu_encoder_phys_wb_set_ot_limit() argument
43 struct dpu_hw_wb *hw_wb = phys_enc->hw_wb; in dpu_encoder_phys_wb_set_ot_limit()
49 ot_params.width = phys_enc->cached_mode.hdisplay; in dpu_encoder_phys_wb_set_ot_limit()
50 ot_params.height = phys_enc->cached_mode.vdisplay; in dpu_encoder_phys_wb_set_ot_limit()
52 ot_params.frame_rate = drm_mode_vrefresh(&phys_enc->cached_mode); in dpu_encoder_phys_wb_set_ot_limit()
57 dpu_vbif_set_ot_limit(phys_enc->dpu_kms, &ot_params); in dpu_encoder_phys_wb_set_ot_limit()
65 struct dpu_encoder_phys *phys_enc) in dpu_encoder_phys_wb_set_qos_remap() argument
70 if (!phys_enc || !phys_enc->parent || !phys_enc->parent->crtc) { in dpu_encoder_phys_wb_set_qos_remap()
75 if (!phys_enc->hw_wb || !phys_enc->hw_wb->caps) { in dpu_encoder_phys_wb_set_qos_remap()
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Ddpu_encoder_phys.h129 int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc);
130 int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc);
131 int (*wait_for_vblank)(struct dpu_encoder_phys *phys_enc);
132 void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc);
133 void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc);
134 void (*trigger_start)(struct dpu_encoder_phys *phys_enc);
135 bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc);
137 void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc);
141 void (*prepare_wb_job)(struct dpu_encoder_phys *phys_enc,
143 void (*cleanup_wb_job)(struct dpu_encoder_phys *phys_enc,
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Ddpu_encoder.c334 void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc, in dpu_encoder_helper_report_irq_timeout() argument
338 DRMID(phys_enc->parent), in dpu_encoder_helper_report_irq_timeout()
339 dpu_encoder_helper_get_intf_type(phys_enc->intf_mode), in dpu_encoder_helper_report_irq_timeout()
340 phys_enc->intf_idx - INTF_0, phys_enc->wb_idx - WB_0, in dpu_encoder_helper_report_irq_timeout()
341 phys_enc->hw_pp->idx - PINGPONG_0, intr_idx); in dpu_encoder_helper_report_irq_timeout()
343 if (phys_enc->parent_ops->handle_frame_done) in dpu_encoder_helper_report_irq_timeout()
344 phys_enc->parent_ops->handle_frame_done( in dpu_encoder_helper_report_irq_timeout()
345 phys_enc->parent, phys_enc, in dpu_encoder_helper_report_irq_timeout()
352 int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, in dpu_encoder_helper_wait_for_irq() argument
367 if (phys_enc->enable_state == DPU_ENC_DISABLED) { in dpu_encoder_helper_wait_for_irq()
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