| /Linux-v6.1/drivers/net/ethernet/ibm/emac/ |
| D | phy.c | 32 #define phy_read _phy_read macro 60 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy() 68 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy() 120 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg() 129 adv = phy_read(phy, MII_ADVERTISE); in genmii_setup_aneg() 150 adv = phy_read(phy, MII_CTRL1000); in genmii_setup_aneg() 162 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg() 178 ctl = phy_read(phy, MII_BMCR); in genmii_setup_forced() 211 phy_read(phy, MII_BMSR); in genmii_poll_link() 212 status = phy_read(phy, MII_BMSR); in genmii_poll_link() [all …]
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| /Linux-v6.1/drivers/net/phy/ |
| D | lxt.c | 66 err = phy_read(phydev, MII_BMSR); in lxt970_ack_interrupt() 71 err = phy_read(phydev, MII_LXT970_ISR); in lxt970_ack_interrupt() 107 irq_status = phy_read(phydev, MII_BMSR); in lxt970_handle_interrupt() 113 irq_status = phy_read(phydev, MII_LXT970_ISR); in lxt970_handle_interrupt() 135 int err = phy_read(phydev, MII_LXT971_ISR); in lxt971_ack_interrupt() 168 irq_status = phy_read(phydev, MII_LXT971_ISR); in lxt971_handle_interrupt() 194 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link() 199 control = phy_read(phydev, MII_BMCR); in lxt973a2_update_link() 205 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link() 233 adv = phy_read(phydev, MII_ADVERTISE); in lxt973a2_read_status() [all …]
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| D | dp83tc811.c | 82 err = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_ack_interrupt() 86 err = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_ack_interrupt() 90 err = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_ack_interrupt() 143 phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_set_wol() 204 misr_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_config_intr() 221 misr_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_config_intr() 236 misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_config_intr() 277 irq_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_handle_interrupt() 285 irq_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_handle_interrupt() 293 irq_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_handle_interrupt() [all …]
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| D | smsc.c | 53 int rc = phy_read(phydev, MII_LAN83C185_ISF); in smsc_phy_ack_interrupt() 91 irq_status = phy_read(phydev, MII_LAN83C185_ISF); in smsc_phy_handle_interrupt() 115 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in smsc_phy_config_init() 128 int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES); in smsc_phy_reset() 165 rc = phy_read(phydev, SPECIAL_CTRL_STS); in lan87xx_config_aneg() 187 rc = phy_read(phydev, PHY_EDPD_CONFIG); in lan95xx_config_aneg_ext() 215 int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status() 227 read_poll_timeout(phy_read, rc, in lan87xx_read_status() 235 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status() 269 val = phy_read(phydev, stat.reg); in smsc_get_stat()
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| D | qsemi.c | 82 err = phy_read(phydev, MII_QS6612_ISR); in qs6612_ack_interrupt() 87 err = phy_read(phydev, MII_BMSR); in qs6612_ack_interrupt() 92 err = phy_read(phydev, MII_EXPANSION); in qs6612_ack_interrupt() 129 irq_status = phy_read(phydev, MII_QS6612_ISR); in qs6612_handle_interrupt()
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| D | ste10Xp.c | 35 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init() 45 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init() 53 int err = phy_read(phydev, MII_XCIIS); in ste10Xp_ack_interrupt() 88 irq_status = phy_read(phydev, MII_XCIIS); in ste10Xp_handle_interrupt()
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| D | dp83848.c | 56 int err = phy_read(phydev, DP83848_MISR); in dp83848_ack_interrupt() 65 control = phy_read(phydev, DP83848_MICR); in dp83848_config_intr() 98 irq_status = phy_read(phydev, DP83848_MISR); in dp83848_handle_interrupt() 119 val = phy_read(phydev, MII_BMCR); in dp83848_config_init()
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| D | et1011c.c | 49 int ctl = phy_read(phydev, MII_BMCR); in et1011c_config_aneg() 71 val = phy_read(phydev, ET1011C_STATUS_REG); in et1011c_read_status() 74 val = phy_read(phydev, ET1011C_CONFIG_REG); in et1011c_read_status()
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| D | national.c | 55 return phy_read(phydev, NS_EXP_MEM_DATA); in ns_exp_read() 66 int ret = phy_read(phydev, DP83865_INT_STATUS); in ns_ack_interrupt() 82 irq_status = phy_read(phydev, DP83865_INT_STATUS); in ns_handle_interrupt() 123 int bmcr = phy_read(phydev, MII_BMCR); in ns_giga_speed_fallback()
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| D | nxp-tja11xx.c | 147 ret = phy_read(phydev, MII_ECTRL); in tja11xx_wakeup() 353 ret = phy_read(phydev, MII_INTSRC); in tja11xx_config_init() 371 ret = phy_read(phydev, MII_CFG1); in tja11xx_read_status() 381 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_read_status() 396 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_get_sqi() 429 ret = phy_read(phydev, tja11xx_hw_stats[i].reg); in tja11xx_get_stats() 447 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read() 456 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read() 638 ret = phy_read(phydev, MII_PHYSID2); in tja1102_match_phy_device() 665 ret = phy_read(phydev, MII_INTSRC); in tja11xx_ack_interrupt() [all …]
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| D | meson-gxl.c | 92 ret = phy_read(phydev, TSTREAD1); in meson_gxl_read_reg() 178 lpa = phy_read(phydev, MII_LPA); in meson_gxl_read_status() 182 exp = phy_read(phydev, MII_EXPANSION); in meson_gxl_read_status() 200 int ret = phy_read(phydev, INTSRC_FLAG); in meson_gxl_ack_interrupt() 230 irq_status = phy_read(phydev, INTSRC_FLAG); in meson_gxl_handle_interrupt()
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| D | amd.c | 35 err = phy_read(phydev, MII_BMSR); in am79c_ack_interrupt() 39 err = phy_read(phydev, MII_AM79C_IR); in am79c_ack_interrupt() 76 irq_status = phy_read(phydev, MII_AM79C_IR); in am79c_handle_interrupt()
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| D | uPD60620.c | 40 phy_state = phy_read(phydev, MII_BMSR); in upd60620_read_status() 50 phy_state = phy_read(phydev, PHY_PHYSCR); in upd60620_read_status() 64 phy_state = phy_read(phydev, MII_LPA); in upd60620_read_status()
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| D | dp83822.c | 169 phy_read(phydev, MII_DP83822_MISR2); in dp83822_set_wol() 228 misr_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_config_intr() 246 misr_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_config_intr() 264 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr() 279 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr() 301 irq_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_handle_interrupt() 309 irq_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_handle_interrupt() 335 int status = phy_read(phydev, MII_DP83822_PHYSTS); in dp83822_read_status() 344 ctrl2 = phy_read(phydev, MII_DP83822_CTRL_2); in dp83822_read_status() 441 bmcr = phy_read(phydev, MII_BMCR); in dp83822_config_init()
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| D | adin.c | 331 val = phy_read(phydev, ADIN1300_PHY_CTRL2); in adin_get_downshift() 335 cnt = phy_read(phydev, ADIN1300_PHY_CTRL3); in adin_get_downshift() 375 val = phy_read(phydev, ADIN1300_PHY_CTRL_STATUS2); in adin_get_edpd() 507 int rc = phy_read(phydev, ADIN1300_INT_STATUS_REG); in adin_phy_ack_intr() 539 irq_status = phy_read(phydev, ADIN1300_INT_STATUS_REG); in adin_phy_handle_interrupt() 634 reg = phy_read(phydev, ADIN1300_PHY_CTRL1); in adin_config_mdix() 676 reg = phy_read(phydev, ADIN1300_PHY_CTRL1); in adin_mdix_update() 697 reg = phy_read(phydev, ADIN1300_PHY_STATUS1); in adin_mdix_update() 794 ret = phy_read(phydev, stat->reg1); in adin_get_stat() 811 rc = phy_read(phydev, ADIN1300_RX_ERR_CNT); in adin_get_stats()
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| D | dp83867.c | 174 int err = phy_read(phydev, MII_DP83867_ISR); in dp83867_ack_interrupt() 190 val_micr = phy_read(phydev, MII_DP83867_MICR); in dp83867_set_wol() 300 micr_status = phy_read(phydev, MII_DP83867_MICR); in dp83867_config_intr() 329 irq_status = phy_read(phydev, MII_DP83867_ISR); in dp83867_handle_interrupt() 335 irq_enabled = phy_read(phydev, MII_DP83867_MICR); in dp83867_handle_interrupt() 351 int status = phy_read(phydev, MII_DP83867_PHYSTS); in dp83867_read_status() 380 val = phy_read(phydev, DP83867_CFG2); in dp83867_get_downshift() 747 val = phy_read(phydev, MII_DP83867_PHYCTRL); in dp83867_config_init() 767 val = phy_read(phydev, MII_DP83867_PHYCTRL); in dp83867_config_init() 873 val = phy_read(phydev, DP83867_CFG3); in dp83867_config_init()
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| D | at803x.c | 340 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read() 417 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save() 418 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save() 419 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save() 420 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save() 421 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save() 422 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save() 486 ret = phy_read(phydev, AT803X_INTR_STATUS); in at803x_set_wol() 494 irq_enabled = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol() 546 val = phy_read(phydev, stat.reg); in at803x_get_stat() [all …]
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| D | bcm-phy-lib.c | 111 return phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm54xx_auxctl_read() 132 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_write_misc() 156 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_read_misc() 174 reg = phy_read(phydev, MII_BCM54XX_ISR); in bcm_phy_ack_intr() 186 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm_phy_config_intr() 213 irq_status = phy_read(phydev, MII_BCM54XX_ISR); in bcm_phy_handle_interrupt() 224 irq_mask = phy_read(phydev, MII_BCM54XX_IMR); in bcm_phy_handle_interrupt() 243 return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD)); in bcm_phy_read_shadow() 537 val = phy_read(phydev, stat.reg); in bcm_phy_get_stat()
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| D | microchip_t1.c | 116 rc = phy_read(phydev, LAN87XX_EXT_REG_CTL); in lan937x_dsp_workaround() 152 rc = phy_read(phydev, offset); in access_ereg() 179 rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA); in access_ereg() 436 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr() 467 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr() 497 irq_status = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_handle_interrupt() 525 bmcr = phy_read(phydev, MII_BMCR); in microchip_cable_test_start_common() 529 bmsr = phy_read(phydev, MII_BMSR); in microchip_cable_test_start_common() 750 rc = phy_read(phydev, T1_MODE_STAT_REG); in lan87xx_read_status()
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| D | davicom.c | 66 int err = phy_read(phydev, MII_DM9161_INTR); in dm9161_ack_interrupt() 76 temp = phy_read(phydev, MII_DM9161_INTR); in dm9161_config_intr() 104 irq_status = phy_read(phydev, MII_DM9161_INTR); in dm9161_handle_interrupt()
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| D | broadcom.c | 83 val = phy_read(phydev, MII_CTRL1000); in bcm54210e_config_init() 341 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init() 615 val = phy_read(phydev, reg); in brcm_phy_setbits() 647 err = phy_read(phydev, MII_BMCR); in brcm_fet_config_init() 651 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init() 667 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init() 678 reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4); in brcm_fet_config_init() 717 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt() 728 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr() 755 irq_status = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_handle_interrupt() [all …]
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| D | vitesse.c | 88 extcon = phy_read(phydev, MII_VSC8244_EXT_CON1); in vsc824x_add_skew() 162 rev = phy_read(phydev, MII_PHYSID2); in vsc738x_config_init() 258 ret = phy_read(phydev, MII_VSC8601_EPHY_CTL); in vsc8601_add_skew() 298 err = phy_read(phydev, MII_VSC8244_ISTAT); in vsc82xx_config_intr() 320 irq_status = phy_read(phydev, MII_VSC8244_ISTAT); in vsc82xx_handle_interrupt()
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| D | intel-xway.c | 185 val = phy_read(phydev, XWAY_MDIO_MIICTRL); in xway_gphy_rgmii_init() 244 phy_read(phydev, XWAY_MDIO_ISTAT); in xway_gphy_config_init() 292 reg = phy_read(phydev, MII_CTRL1000); in xway_gphy14_config_aneg() 305 reg = phy_read(phydev, XWAY_MDIO_ISTAT); in xway_gphy_ack_interrupt() 336 irq_status = phy_read(phydev, XWAY_MDIO_ISTAT); in xway_gphy_handle_interrupt()
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| D | realtek.c | 134 err = phy_read(phydev, RTL8201F_ISR); in rtl8201_ack_interrupt() 143 err = phy_read(phydev, RTL821x_INSR); in rtl821x_ack_interrupt() 253 irq_status = phy_read(phydev, RTL8201F_ISR); in rtl8201_handle_interrupt() 271 irq_status = phy_read(phydev, RTL821x_INSR); in rtl821x_handle_interrupt() 277 irq_enabled = phy_read(phydev, RTL821x_INER); in rtl821x_handle_interrupt() 708 val = phy_read(phydev, 0x13); in rtlgen_supports_2_5gbps() 782 ret = phy_read(phydev, MII_CTRL1000); in rtl9000a_read_status() 790 ret = phy_read(phydev, MII_STAT1000); in rtl9000a_read_status() 805 err = phy_read(phydev, RTL8211F_INSR); in rtl9000a_ack_interrupt() 838 irq_status = phy_read(phydev, RTL8211F_INSR); in rtl9000a_handle_interrupt()
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| /Linux-v6.1/arch/powerpc/platforms/85xx/ |
| D | mpc85xx_mds.c | 69 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock() 84 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock() 105 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups() 121 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups() 126 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups() 139 temp = phy_read(phydev, 16); in mpc8568_mds_phy_fixups()
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