Searched refs:num_pipe_per_me (Results 1 – 4 of 4) sorted by relevance
77 bit += me * adev->gfx.me.num_pipe_per_me in amdgpu_gfx_me_queue_to_bit()90 % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()92 / adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()148 return amdgpu_async_gfx_ring && adev->gfx.me.num_pipe_per_me > 1; in amdgpu_gfx_is_graphics_multipipe_capable()233 int max_queues_per_me = adev->gfx.me.num_pipe_per_me * in amdgpu_gfx_graphics_queue_acquire()240 pipe = i % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_graphics_queue_acquire()241 queue = (i / adev->gfx.me.num_pipe_per_me) % in amdgpu_gfx_graphics_queue_acquire()
264 uint32_t num_pipe_per_me; member
1289 adev->gfx.me.num_pipe_per_me = 1; in gfx_v11_0_sw_init()1297 adev->gfx.me.num_pipe_per_me = 1; in gfx_v11_0_sw_init()1355 for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) { in gfx_v11_0_sw_init()2124 for (pipe_id = 0; pipe_id < adev->gfx.me.num_pipe_per_me; pipe_id++) { in gfx_v11_0_config_pfp_cache_rs64()2247 for (pipe_id = 0; pipe_id < adev->gfx.me.num_pipe_per_me; pipe_id++) { in gfx_v11_0_config_me_cache_rs64()2724 for (pipe_id = 0; pipe_id < adev->gfx.me.num_pipe_per_me; pipe_id++) { in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()2939 for (pipe_id = 0; pipe_id < adev->gfx.me.num_pipe_per_me; pipe_id++) { in gfx_v11_0_cp_gfx_load_me_microcode_rs64()4502 for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) { in gfx_v11_0_soft_reset()
4596 adev->gfx.me.num_pipe_per_me = 1; in gfx_v10_0_sw_init()4611 adev->gfx.me.num_pipe_per_me = 1; in gfx_v10_0_sw_init()4619 adev->gfx.me.num_pipe_per_me = 1; in gfx_v10_0_sw_init()4678 for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) { in gfx_v10_0_sw_init()
