Searched refs:native_wrmsrl (Results 1 – 6 of 6) sorted by relevance
60 native_wrmsrl(MSR_IA32_UCODE_REV, 0); in intel_get_microcode_revision()
110 #define native_wrmsrl(msr, val) \ macro
108 native_wrmsrl(MSR_AMD64_SEV_ES_GHCB, val); in wr_ghcb_msr()
396 native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc->hdr.data_code); in __apply_microcode_amd()
527 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); in apply_microcode_early()
394 native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, msr); in vmx_disable_fb_clear()405 native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl); in vmx_enable_fb_clear()6523 native_wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH); in vmx_l1d_flush()7051 native_wrmsrl(MSR_IA32_SPEC_CTRL, hostval); in vmx_spec_ctrl_restore_host()