1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include <linux/etherdevice.h>
5 #include <linux/hwmon.h>
6 #include <linux/hwmon-sysfs.h>
7 #include <linux/thermal.h>
8 #include "mt7915.h"
9 #include "mac.h"
10 #include "mcu.h"
11 #include "eeprom.h"
12
13 static const struct ieee80211_iface_limit if_limits[] = {
14 {
15 .max = 1,
16 .types = BIT(NL80211_IFTYPE_ADHOC)
17 }, {
18 .max = 16,
19 .types = BIT(NL80211_IFTYPE_AP)
20 #ifdef CONFIG_MAC80211_MESH
21 | BIT(NL80211_IFTYPE_MESH_POINT)
22 #endif
23 }, {
24 .max = MT7915_MAX_INTERFACES,
25 .types = BIT(NL80211_IFTYPE_STATION)
26 }
27 };
28
29 static const struct ieee80211_iface_combination if_comb[] = {
30 {
31 .limits = if_limits,
32 .n_limits = ARRAY_SIZE(if_limits),
33 .max_interfaces = MT7915_MAX_INTERFACES,
34 .num_different_channels = 1,
35 .beacon_int_infra_match = true,
36 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
37 BIT(NL80211_CHAN_WIDTH_20) |
38 BIT(NL80211_CHAN_WIDTH_40) |
39 BIT(NL80211_CHAN_WIDTH_80) |
40 BIT(NL80211_CHAN_WIDTH_160) |
41 BIT(NL80211_CHAN_WIDTH_80P80),
42 }
43 };
44
mt7915_thermal_temp_show(struct device * dev,struct device_attribute * attr,char * buf)45 static ssize_t mt7915_thermal_temp_show(struct device *dev,
46 struct device_attribute *attr,
47 char *buf)
48 {
49 struct mt7915_phy *phy = dev_get_drvdata(dev);
50 int i = to_sensor_dev_attr(attr)->index;
51 int temperature;
52
53 switch (i) {
54 case 0:
55 temperature = mt7915_mcu_get_temperature(phy);
56 if (temperature < 0)
57 return temperature;
58 /* display in millidegree celcius */
59 return sprintf(buf, "%u\n", temperature * 1000);
60 case 1:
61 case 2:
62 return sprintf(buf, "%u\n",
63 phy->throttle_temp[i - 1] * 1000);
64 case 3:
65 return sprintf(buf, "%hhu\n", phy->throttle_state);
66 default:
67 return -EINVAL;
68 }
69 }
70
mt7915_thermal_temp_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)71 static ssize_t mt7915_thermal_temp_store(struct device *dev,
72 struct device_attribute *attr,
73 const char *buf, size_t count)
74 {
75 struct mt7915_phy *phy = dev_get_drvdata(dev);
76 int ret, i = to_sensor_dev_attr(attr)->index;
77 long val;
78
79 ret = kstrtol(buf, 10, &val);
80 if (ret < 0)
81 return ret;
82
83 mutex_lock(&phy->dev->mt76.mutex);
84 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130);
85 phy->throttle_temp[i - 1] = val;
86 mutex_unlock(&phy->dev->mt76.mutex);
87
88 return count;
89 }
90
91 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
92 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
93 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
94 static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3);
95
96 static struct attribute *mt7915_hwmon_attrs[] = {
97 &sensor_dev_attr_temp1_input.dev_attr.attr,
98 &sensor_dev_attr_temp1_crit.dev_attr.attr,
99 &sensor_dev_attr_temp1_max.dev_attr.attr,
100 &sensor_dev_attr_throttle1.dev_attr.attr,
101 NULL,
102 };
103 ATTRIBUTE_GROUPS(mt7915_hwmon);
104
105 static int
mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device * cdev,unsigned long * state)106 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
107 unsigned long *state)
108 {
109 *state = MT7915_CDEV_THROTTLE_MAX;
110
111 return 0;
112 }
113
114 static int
mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device * cdev,unsigned long * state)115 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
116 unsigned long *state)
117 {
118 struct mt7915_phy *phy = cdev->devdata;
119
120 *state = phy->cdev_state;
121
122 return 0;
123 }
124
125 static int
mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device * cdev,unsigned long state)126 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
127 unsigned long state)
128 {
129 struct mt7915_phy *phy = cdev->devdata;
130 u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state;
131 int ret;
132
133 if (state > MT7915_CDEV_THROTTLE_MAX)
134 return -EINVAL;
135
136 if (phy->throttle_temp[0] > phy->throttle_temp[1])
137 return 0;
138
139 if (state == phy->cdev_state)
140 return 0;
141
142 /*
143 * cooling_device convention: 0 = no cooling, more = more cooling
144 * mcu convention: 1 = max cooling, more = less cooling
145 */
146 ret = mt7915_mcu_set_thermal_throttling(phy, throttling);
147 if (ret)
148 return ret;
149
150 phy->cdev_state = state;
151
152 return 0;
153 }
154
155 static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
156 .get_max_state = mt7915_thermal_get_max_throttle_state,
157 .get_cur_state = mt7915_thermal_get_cur_throttle_state,
158 .set_cur_state = mt7915_thermal_set_cur_throttle_state,
159 };
160
mt7915_unregister_thermal(struct mt7915_phy * phy)161 static void mt7915_unregister_thermal(struct mt7915_phy *phy)
162 {
163 struct wiphy *wiphy = phy->mt76->hw->wiphy;
164
165 if (!phy->cdev)
166 return;
167
168 sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
169 thermal_cooling_device_unregister(phy->cdev);
170 }
171
mt7915_thermal_init(struct mt7915_phy * phy)172 static int mt7915_thermal_init(struct mt7915_phy *phy)
173 {
174 struct wiphy *wiphy = phy->mt76->hw->wiphy;
175 struct thermal_cooling_device *cdev;
176 struct device *hwmon;
177 const char *name;
178
179 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
180 wiphy_name(wiphy));
181
182 cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
183 if (!IS_ERR(cdev)) {
184 if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
185 "cooling_device") < 0)
186 thermal_cooling_device_unregister(cdev);
187 else
188 phy->cdev = cdev;
189 }
190
191 if (!IS_REACHABLE(CONFIG_HWMON))
192 return 0;
193
194 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
195 mt7915_hwmon_groups);
196 if (IS_ERR(hwmon))
197 return PTR_ERR(hwmon);
198
199 /* initialize critical/maximum high temperature */
200 phy->throttle_temp[0] = 110;
201 phy->throttle_temp[1] = 120;
202
203 return mt7915_mcu_set_thermal_throttling(phy,
204 MT7915_THERMAL_THROTTLE_MAX);
205 }
206
mt7915_led_set_config(struct led_classdev * led_cdev,u8 delay_on,u8 delay_off)207 static void mt7915_led_set_config(struct led_classdev *led_cdev,
208 u8 delay_on, u8 delay_off)
209 {
210 struct mt7915_dev *dev;
211 struct mt76_dev *mt76;
212 u32 val;
213
214 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev);
215 dev = container_of(mt76, struct mt7915_dev, mt76);
216
217 /* select TX blink mode, 2: only data frames */
218 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
219
220 /* enable LED */
221 mt76_wr(dev, MT_LED_EN(0), 1);
222
223 /* set LED Tx blink on/off time */
224 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
225 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
226 mt76_wr(dev, MT_LED_TX_BLINK(0), val);
227
228 /* control LED */
229 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
230 if (dev->mt76.led_al)
231 val |= MT_LED_CTRL_POLARITY;
232
233 mt76_wr(dev, MT_LED_CTRL(0), val);
234 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
235 }
236
mt7915_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)237 static int mt7915_led_set_blink(struct led_classdev *led_cdev,
238 unsigned long *delay_on,
239 unsigned long *delay_off)
240 {
241 u16 delta_on = 0, delta_off = 0;
242
243 #define HW_TICK 10
244 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
245
246 if (*delay_on)
247 delta_on = TO_HW_TICK(*delay_on);
248 if (*delay_off)
249 delta_off = TO_HW_TICK(*delay_off);
250
251 mt7915_led_set_config(led_cdev, delta_on, delta_off);
252
253 return 0;
254 }
255
mt7915_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)256 static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
257 enum led_brightness brightness)
258 {
259 if (!brightness)
260 mt7915_led_set_config(led_cdev, 0, 0xff);
261 else
262 mt7915_led_set_config(led_cdev, 0xff, 0);
263 }
264
265 static void
mt7915_init_txpower(struct mt7915_dev * dev,struct ieee80211_supported_band * sband)266 mt7915_init_txpower(struct mt7915_dev *dev,
267 struct ieee80211_supported_band *sband)
268 {
269 int i, n_chains = hweight8(dev->mphy.antenna_mask);
270 int nss_delta = mt76_tx_power_nss_delta(n_chains);
271 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
272 struct mt76_power_limits limits;
273
274 for (i = 0; i < sband->n_channels; i++) {
275 struct ieee80211_channel *chan = &sband->channels[i];
276 u32 target_power = 0;
277 int j;
278
279 for (j = 0; j < n_chains; j++) {
280 u32 val;
281
282 val = mt7915_eeprom_get_target_power(dev, chan, j);
283 target_power = max(target_power, val);
284 }
285
286 target_power += pwr_delta;
287 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
288 &limits,
289 target_power);
290 target_power += nss_delta;
291 target_power = DIV_ROUND_UP(target_power, 2);
292 chan->max_power = min_t(int, chan->max_reg_power,
293 target_power);
294 chan->orig_mpwr = target_power;
295 }
296 }
297
298 static void
mt7915_regd_notifier(struct wiphy * wiphy,struct regulatory_request * request)299 mt7915_regd_notifier(struct wiphy *wiphy,
300 struct regulatory_request *request)
301 {
302 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
303 struct mt7915_dev *dev = mt7915_hw_dev(hw);
304 struct mt76_phy *mphy = hw->priv;
305 struct mt7915_phy *phy = mphy->priv;
306
307 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
308 dev->mt76.region = request->dfs_region;
309
310 if (dev->mt76.region == NL80211_DFS_UNSET)
311 mt7915_mcu_rdd_background_enable(phy, NULL);
312
313 mt7915_init_txpower(dev, &mphy->sband_2g.sband);
314 mt7915_init_txpower(dev, &mphy->sband_5g.sband);
315 mt7915_init_txpower(dev, &mphy->sband_6g.sband);
316
317 mphy->dfs_state = MT_DFS_STATE_UNKNOWN;
318 mt7915_dfs_init_radar_detector(phy);
319 }
320
321 static void
mt7915_init_wiphy(struct ieee80211_hw * hw)322 mt7915_init_wiphy(struct ieee80211_hw *hw)
323 {
324 struct mt7915_phy *phy = mt7915_hw_phy(hw);
325 struct mt76_dev *mdev = &phy->dev->mt76;
326 struct wiphy *wiphy = hw->wiphy;
327 struct mt7915_dev *dev = phy->dev;
328
329 hw->queues = 4;
330 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
331 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
332 hw->netdev_features = NETIF_F_RXCSUM;
333
334 hw->radiotap_timestamp.units_pos =
335 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
336
337 phy->slottime = 9;
338
339 hw->sta_data_size = sizeof(struct mt7915_sta);
340 hw->vif_data_size = sizeof(struct mt7915_vif);
341
342 wiphy->iface_combinations = if_comb;
343 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
344 wiphy->reg_notifier = mt7915_regd_notifier;
345 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
346 wiphy->mbssid_max_interfaces = 16;
347
348 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
349 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
350 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
351 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
352 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
353 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
354 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
355 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
356
357 if (!mdev->dev->of_node ||
358 !of_property_read_bool(mdev->dev->of_node,
359 "mediatek,disable-radar-background"))
360 wiphy_ext_feature_set(wiphy,
361 NL80211_EXT_FEATURE_RADAR_BACKGROUND);
362
363 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
364 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
365 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
366 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
367 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
368 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
369
370 hw->max_tx_fragments = 4;
371
372 if (phy->mt76->cap.has_2ghz) {
373 phy->mt76->sband_2g.sband.ht_cap.cap |=
374 IEEE80211_HT_CAP_LDPC_CODING |
375 IEEE80211_HT_CAP_MAX_AMSDU;
376 phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
377 IEEE80211_HT_MPDU_DENSITY_4;
378 }
379
380 if (phy->mt76->cap.has_5ghz) {
381 phy->mt76->sband_5g.sband.ht_cap.cap |=
382 IEEE80211_HT_CAP_LDPC_CODING |
383 IEEE80211_HT_CAP_MAX_AMSDU;
384 phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
385 IEEE80211_HT_MPDU_DENSITY_4;
386
387 if (is_mt7915(&dev->mt76)) {
388 phy->mt76->sband_5g.sband.vht_cap.cap |=
389 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
390 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
391
392 if (!dev->dbdc_support)
393 phy->mt76->sband_5g.sband.vht_cap.cap |=
394 IEEE80211_VHT_CAP_SHORT_GI_160 |
395 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
396 } else {
397 phy->mt76->sband_5g.sband.vht_cap.cap |=
398 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
399 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
400
401 /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */
402 phy->mt76->sband_5g.sband.vht_cap.cap |=
403 IEEE80211_VHT_CAP_SHORT_GI_160 |
404 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
405 }
406 }
407
408 mt76_set_stream_caps(phy->mt76, true);
409 mt7915_set_stream_vht_txbf_caps(phy);
410 mt7915_set_stream_he_caps(phy);
411
412 wiphy->available_antennas_rx = phy->mt76->antenna_mask;
413 wiphy->available_antennas_tx = phy->mt76->antenna_mask;
414 }
415
416 static void
mt7915_mac_init_band(struct mt7915_dev * dev,u8 band)417 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
418 {
419 u32 mask, set;
420
421 mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
422 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
423 mt76_set(dev, MT_TMAC_CTCR0(band),
424 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
425 MT_TMAC_CTCR0_INS_DDLMT_EN);
426
427 mask = MT_MDP_RCFR0_MCU_RX_MGMT |
428 MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
429 MT_MDP_RCFR0_MCU_RX_CTL_BAR;
430 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
431 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
432 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
433 mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
434
435 mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
436 MT_MDP_RCFR1_RX_DROPPED_UCAST |
437 MT_MDP_RCFR1_RX_DROPPED_MCAST;
438 set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
439 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
440 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
441 mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
442
443 mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
444
445 /* mt7915: disable rx rate report by default due to hw issues */
446 mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
447 }
448
mt7915_mac_init(struct mt7915_dev * dev)449 static void mt7915_mac_init(struct mt7915_dev *dev)
450 {
451 int i;
452 u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680;
453
454 /* config pse qid6 wfdma port selection */
455 if (!is_mt7915(&dev->mt76) && dev->hif2)
456 mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0,
457 MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK);
458
459 mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len);
460
461 if (!is_mt7915(&dev->mt76))
462 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
463
464 /* enable hardware de-agg */
465 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
466
467 for (i = 0; i < mt7915_wtbl_size(dev); i++)
468 mt7915_mac_wtbl_update(dev, i,
469 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
470 for (i = 0; i < 2; i++)
471 mt7915_mac_init_band(dev, i);
472
473 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
474 i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
475 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
476 }
477 }
478
mt7915_txbf_init(struct mt7915_dev * dev)479 static int mt7915_txbf_init(struct mt7915_dev *dev)
480 {
481 int ret;
482
483 if (dev->dbdc_support) {
484 ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
485 if (ret)
486 return ret;
487 }
488
489 /* trigger sounding packets */
490 ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
491 if (ret)
492 return ret;
493
494 /* enable eBF */
495 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
496 }
497
498 static struct mt7915_phy *
mt7915_alloc_ext_phy(struct mt7915_dev * dev)499 mt7915_alloc_ext_phy(struct mt7915_dev *dev)
500 {
501 struct mt7915_phy *phy;
502 struct mt76_phy *mphy;
503
504 if (!dev->dbdc_support)
505 return NULL;
506
507 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1);
508 if (!mphy)
509 return ERR_PTR(-ENOMEM);
510
511 phy = mphy->priv;
512 phy->dev = dev;
513 phy->mt76 = mphy;
514
515 /* Bind main phy to band0 and ext_phy to band1 for dbdc case */
516 phy->band_idx = 1;
517
518 return phy;
519 }
520
521 static int
mt7915_register_ext_phy(struct mt7915_dev * dev,struct mt7915_phy * phy)522 mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
523 {
524 struct mt76_phy *mphy = phy->mt76;
525 int ret;
526
527 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
528
529 mt7915_eeprom_parse_hw_cap(dev, phy);
530
531 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
532 ETH_ALEN);
533 /* Make the secondary PHY MAC address local without overlapping with
534 * the usual MAC address allocation scheme on multiple virtual interfaces
535 */
536 if (!is_valid_ether_addr(mphy->macaddr)) {
537 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
538 ETH_ALEN);
539 mphy->macaddr[0] |= 2;
540 mphy->macaddr[0] ^= BIT(7);
541 }
542 mt76_eeprom_override(mphy);
543
544 /* init wiphy according to mphy and phy */
545 mt7915_init_wiphy(mphy->hw);
546
547 ret = mt76_register_phy(mphy, true, mt76_rates,
548 ARRAY_SIZE(mt76_rates));
549 if (ret)
550 return ret;
551
552 ret = mt7915_thermal_init(phy);
553 if (ret)
554 goto unreg;
555
556 mt7915_init_debugfs(phy);
557
558 return 0;
559
560 unreg:
561 mt76_unregister_phy(mphy);
562 return ret;
563 }
564
mt7915_init_work(struct work_struct * work)565 static void mt7915_init_work(struct work_struct *work)
566 {
567 struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
568 init_work);
569
570 mt7915_mcu_set_eeprom(dev);
571 mt7915_mac_init(dev);
572 mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
573 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
574 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
575 mt7915_txbf_init(dev);
576 }
577
mt7915_wfsys_reset(struct mt7915_dev * dev)578 void mt7915_wfsys_reset(struct mt7915_dev *dev)
579 {
580 #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0)
581 #define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16)
582
583 if (is_mt7915(&dev->mt76)) {
584 u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
585
586 mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
587
588 /* change to software control */
589 val |= MT_TOP_PWR_SW_RST;
590 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
591
592 /* reset wfsys */
593 val &= ~MT_TOP_PWR_SW_RST;
594 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
595
596 /* release wfsys then mcu re-executes romcode */
597 val |= MT_TOP_PWR_SW_RST;
598 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
599
600 /* switch to hw control */
601 val &= ~MT_TOP_PWR_SW_RST;
602 val |= MT_TOP_PWR_HW_CTRL;
603 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
604
605 /* check whether mcu resets to default */
606 if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR,
607 MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT,
608 1000)) {
609 dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
610 return;
611 }
612
613 /* wfsys reset won't clear host registers */
614 mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
615
616 msleep(100);
617 } else if (is_mt7986(&dev->mt76)) {
618 mt7986_wmac_disable(dev);
619 msleep(20);
620
621 mt7986_wmac_enable(dev);
622 msleep(20);
623 } else {
624 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
625 msleep(20);
626
627 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
628 msleep(20);
629 }
630 }
631
mt7915_band_config(struct mt7915_dev * dev)632 static bool mt7915_band_config(struct mt7915_dev *dev)
633 {
634 bool ret = true;
635
636 dev->phy.band_idx = 0;
637
638 if (is_mt7986(&dev->mt76)) {
639 u32 sku = mt7915_check_adie(dev, true);
640
641 /*
642 * for mt7986, dbdc support is determined by the number
643 * of adie chips and the main phy is bound to band1 when
644 * dbdc is disabled.
645 */
646 if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) {
647 dev->phy.band_idx = 1;
648 ret = false;
649 }
650 } else {
651 ret = is_mt7915(&dev->mt76) ?
652 !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true;
653 }
654
655 return ret;
656 }
657
658 static int
mt7915_init_hardware(struct mt7915_dev * dev,struct mt7915_phy * phy2)659 mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
660 {
661 int ret, idx;
662
663 mt76_wr(dev, MT_INT_MASK_CSR, 0);
664 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
665
666 INIT_WORK(&dev->init_work, mt7915_init_work);
667
668 ret = mt7915_dma_init(dev, phy2);
669 if (ret)
670 return ret;
671
672 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
673
674 ret = mt7915_mcu_init(dev);
675 if (ret)
676 return ret;
677
678 ret = mt7915_eeprom_init(dev);
679 if (ret < 0)
680 return ret;
681
682 if (dev->flash_mode) {
683 ret = mt7915_mcu_apply_group_cal(dev);
684 if (ret)
685 return ret;
686 }
687
688 /* Beacon and mgmt frames should occupy wcid 0 */
689 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
690 if (idx)
691 return -ENOSPC;
692
693 dev->mt76.global_wcid.idx = idx;
694 dev->mt76.global_wcid.hw_key_idx = -1;
695 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
696 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
697
698 return 0;
699 }
700
mt7915_set_stream_vht_txbf_caps(struct mt7915_phy * phy)701 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
702 {
703 int nss;
704 u32 *cap;
705
706 if (!phy->mt76->cap.has_5ghz)
707 return;
708
709 nss = hweight8(phy->mt76->chainmask);
710 cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
711
712 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
713 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
714 (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
715
716 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
717 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
718 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
719
720 if (nss < 2)
721 return;
722
723 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
724 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
725 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
726 nss - 1);
727 }
728
729 static void
mt7915_set_stream_he_txbf_caps(struct mt7915_dev * dev,struct ieee80211_sta_he_cap * he_cap,int vif,int nss)730 mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev,
731 struct ieee80211_sta_he_cap *he_cap,
732 int vif, int nss)
733 {
734 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
735 u8 c, nss_160;
736
737 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
738 if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
739 nss_160 = nss / 2;
740 else
741 nss_160 = nss;
742
743 #ifdef CONFIG_MAC80211_MESH
744 if (vif == NL80211_IFTYPE_MESH_POINT)
745 return;
746 #endif
747
748 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
749 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
750
751 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
752 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
753 elem->phy_cap_info[5] &= ~c;
754
755 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
756 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
757 elem->phy_cap_info[6] &= ~c;
758
759 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
760
761 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US;
762 if (!is_mt7915(&dev->mt76))
763 c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
764 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
765 elem->phy_cap_info[2] |= c;
766
767 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
768 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
769 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
770 elem->phy_cap_info[4] |= c;
771
772 /* do not support NG16 due to spec D4.0 changes subcarrier idx */
773 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
774 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
775
776 if (vif == NL80211_IFTYPE_STATION)
777 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
778
779 elem->phy_cap_info[6] |= c;
780
781 if (nss < 2)
782 return;
783
784 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
785 elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3;
786
787 if (vif != NL80211_IFTYPE_AP)
788 return;
789
790 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
791 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
792
793 /* num_snd_dim
794 * for mt7915, max supported nss is 2 for bw > 80MHz
795 */
796 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
797 nss - 1) |
798 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
799 nss_160 - 1);
800 elem->phy_cap_info[5] |= c;
801
802 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
803 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
804 elem->phy_cap_info[6] |= c;
805
806 if (!is_mt7915(&dev->mt76)) {
807 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
808 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
809 elem->phy_cap_info[7] |= c;
810 }
811 }
812
813 static void
mt7915_gen_ppe_thresh(u8 * he_ppet,int nss)814 mt7915_gen_ppe_thresh(u8 *he_ppet, int nss)
815 {
816 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */
817 static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71};
818
819 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |
820 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,
821 ru_bit_mask);
822
823 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *
824 nss * hweight8(ru_bit_mask) * 2;
825 ppet_size = DIV_ROUND_UP(ppet_bits, 8);
826
827 for (i = 0; i < ppet_size - 1; i++)
828 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];
829
830 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &
831 (0xff >> (8 - (ppet_bits - 1) % 8));
832 }
833
834 static int
mt7915_init_he_caps(struct mt7915_phy * phy,enum nl80211_band band,struct ieee80211_sband_iftype_data * data)835 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
836 struct ieee80211_sband_iftype_data *data)
837 {
838 struct mt7915_dev *dev = phy->dev;
839 int i, idx = 0, nss = hweight8(phy->mt76->chainmask);
840 u16 mcs_map = 0;
841 u16 mcs_map_160 = 0;
842 u8 nss_160;
843
844 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
845 if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
846 nss_160 = nss / 2;
847 else
848 nss_160 = nss;
849
850 for (i = 0; i < 8; i++) {
851 if (i < nss)
852 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
853 else
854 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
855
856 if (i < nss_160)
857 mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
858 else
859 mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
860 }
861
862 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
863 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
864 struct ieee80211_he_cap_elem *he_cap_elem =
865 &he_cap->he_cap_elem;
866 struct ieee80211_he_mcs_nss_supp *he_mcs =
867 &he_cap->he_mcs_nss_supp;
868
869 switch (i) {
870 case NL80211_IFTYPE_STATION:
871 case NL80211_IFTYPE_AP:
872 #ifdef CONFIG_MAC80211_MESH
873 case NL80211_IFTYPE_MESH_POINT:
874 #endif
875 break;
876 default:
877 continue;
878 }
879
880 data[idx].types_mask = BIT(i);
881 he_cap->has_he = true;
882
883 he_cap_elem->mac_cap_info[0] =
884 IEEE80211_HE_MAC_CAP0_HTC_HE;
885 he_cap_elem->mac_cap_info[3] =
886 IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
887 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
888 he_cap_elem->mac_cap_info[4] =
889 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
890
891 if (band == NL80211_BAND_2GHZ)
892 he_cap_elem->phy_cap_info[0] =
893 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
894 else
895 he_cap_elem->phy_cap_info[0] =
896 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
897 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
898 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
899
900 he_cap_elem->phy_cap_info[1] =
901 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
902 he_cap_elem->phy_cap_info[2] =
903 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
904 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
905
906 switch (i) {
907 case NL80211_IFTYPE_AP:
908 he_cap_elem->mac_cap_info[0] |=
909 IEEE80211_HE_MAC_CAP0_TWT_RES;
910 he_cap_elem->mac_cap_info[2] |=
911 IEEE80211_HE_MAC_CAP2_BSR;
912 he_cap_elem->mac_cap_info[4] |=
913 IEEE80211_HE_MAC_CAP4_BQR;
914 he_cap_elem->mac_cap_info[5] |=
915 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
916 he_cap_elem->phy_cap_info[3] |=
917 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
918 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
919 he_cap_elem->phy_cap_info[6] |=
920 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
921 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
922 he_cap_elem->phy_cap_info[9] |=
923 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
924 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
925 break;
926 case NL80211_IFTYPE_STATION:
927 he_cap_elem->mac_cap_info[1] |=
928 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
929
930 if (band == NL80211_BAND_2GHZ)
931 he_cap_elem->phy_cap_info[0] |=
932 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
933 else
934 he_cap_elem->phy_cap_info[0] |=
935 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
936
937 he_cap_elem->phy_cap_info[1] |=
938 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
939 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
940 he_cap_elem->phy_cap_info[3] |=
941 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
942 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
943 he_cap_elem->phy_cap_info[6] |=
944 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
945 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
946 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
947 he_cap_elem->phy_cap_info[7] |=
948 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
949 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
950 he_cap_elem->phy_cap_info[8] |=
951 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
952 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
953 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
954 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
955 he_cap_elem->phy_cap_info[9] |=
956 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
957 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
958 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
959 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
960 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
961 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
962 break;
963 }
964
965 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
966 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
967 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
968 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
969 he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160);
970 he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160);
971
972 mt7915_set_stream_he_txbf_caps(dev, he_cap, i, nss);
973
974 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
975 if (he_cap_elem->phy_cap_info[6] &
976 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
977 mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss);
978 } else {
979 he_cap_elem->phy_cap_info[9] |=
980 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
981 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
982 }
983
984 if (band == NL80211_BAND_6GHZ) {
985 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
986 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
987
988 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2,
989 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
990 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
991 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
992 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
993 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
994
995 data[idx].he_6ghz_capa.capa = cpu_to_le16(cap);
996 }
997
998 idx++;
999 }
1000
1001 return idx;
1002 }
1003
mt7915_set_stream_he_caps(struct mt7915_phy * phy)1004 void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
1005 {
1006 struct ieee80211_sband_iftype_data *data;
1007 struct ieee80211_supported_band *band;
1008 int n;
1009
1010 if (phy->mt76->cap.has_2ghz) {
1011 data = phy->iftype[NL80211_BAND_2GHZ];
1012 n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
1013
1014 band = &phy->mt76->sband_2g.sband;
1015 band->iftype_data = data;
1016 band->n_iftype_data = n;
1017 }
1018
1019 if (phy->mt76->cap.has_5ghz) {
1020 data = phy->iftype[NL80211_BAND_5GHZ];
1021 n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
1022
1023 band = &phy->mt76->sband_5g.sband;
1024 band->iftype_data = data;
1025 band->n_iftype_data = n;
1026 }
1027
1028 if (phy->mt76->cap.has_6ghz) {
1029 data = phy->iftype[NL80211_BAND_6GHZ];
1030 n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
1031
1032 band = &phy->mt76->sband_6g.sband;
1033 band->iftype_data = data;
1034 band->n_iftype_data = n;
1035 }
1036 }
1037
mt7915_unregister_ext_phy(struct mt7915_dev * dev)1038 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
1039 {
1040 struct mt7915_phy *phy = mt7915_ext_phy(dev);
1041 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
1042
1043 if (!phy)
1044 return;
1045
1046 mt7915_unregister_thermal(phy);
1047 mt76_unregister_phy(mphy);
1048 ieee80211_free_hw(mphy->hw);
1049 }
1050
mt7915_stop_hardware(struct mt7915_dev * dev)1051 static void mt7915_stop_hardware(struct mt7915_dev *dev)
1052 {
1053 mt7915_mcu_exit(dev);
1054 mt7915_tx_token_put(dev);
1055 mt7915_dma_cleanup(dev);
1056 tasklet_disable(&dev->irq_tasklet);
1057
1058 if (is_mt7986(&dev->mt76))
1059 mt7986_wmac_disable(dev);
1060 }
1061
1062
mt7915_register_device(struct mt7915_dev * dev)1063 int mt7915_register_device(struct mt7915_dev *dev)
1064 {
1065 struct ieee80211_hw *hw = mt76_hw(dev);
1066 struct mt7915_phy *phy2;
1067 int ret;
1068
1069 dev->phy.dev = dev;
1070 dev->phy.mt76 = &dev->mt76.phy;
1071 dev->mt76.phy.priv = &dev->phy;
1072 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
1073 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
1074 INIT_LIST_HEAD(&dev->sta_rc_list);
1075 INIT_LIST_HEAD(&dev->sta_poll_list);
1076 INIT_LIST_HEAD(&dev->twt_list);
1077 spin_lock_init(&dev->sta_poll_lock);
1078
1079 init_waitqueue_head(&dev->reset_wait);
1080 INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
1081
1082 dev->dbdc_support = mt7915_band_config(dev);
1083
1084 phy2 = mt7915_alloc_ext_phy(dev);
1085 if (IS_ERR(phy2))
1086 return PTR_ERR(phy2);
1087
1088 ret = mt7915_init_hardware(dev, phy2);
1089 if (ret)
1090 goto free_phy2;
1091
1092 mt7915_init_wiphy(hw);
1093
1094 #ifdef CONFIG_NL80211_TESTMODE
1095 dev->mt76.test_ops = &mt7915_testmode_ops;
1096 #endif
1097
1098 /* init led callbacks */
1099 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
1100 dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness;
1101 dev->mt76.led_cdev.blink_set = mt7915_led_set_blink;
1102 }
1103
1104 ret = mt76_register_device(&dev->mt76, true, mt76_rates,
1105 ARRAY_SIZE(mt76_rates));
1106 if (ret)
1107 goto stop_hw;
1108
1109 ret = mt7915_thermal_init(&dev->phy);
1110 if (ret)
1111 goto unreg_dev;
1112
1113 ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
1114
1115 if (phy2) {
1116 ret = mt7915_register_ext_phy(dev, phy2);
1117 if (ret)
1118 goto unreg_thermal;
1119 }
1120
1121 mt7915_init_debugfs(&dev->phy);
1122
1123 return 0;
1124
1125 unreg_thermal:
1126 mt7915_unregister_thermal(&dev->phy);
1127 unreg_dev:
1128 mt76_unregister_device(&dev->mt76);
1129 stop_hw:
1130 mt7915_stop_hardware(dev);
1131 free_phy2:
1132 if (phy2)
1133 ieee80211_free_hw(phy2->mt76->hw);
1134 return ret;
1135 }
1136
mt7915_unregister_device(struct mt7915_dev * dev)1137 void mt7915_unregister_device(struct mt7915_dev *dev)
1138 {
1139 mt7915_unregister_ext_phy(dev);
1140 mt7915_unregister_thermal(&dev->phy);
1141 mt76_unregister_device(&dev->mt76);
1142 mt7915_stop_hardware(dev);
1143
1144 mt76_free_device(&dev->mt76);
1145 }
1146
