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Searched refs:mmVCE_RB_WPTR3 (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_3_0_d.h53 #define mmVCE_RB_WPTR3 0x80d8 macro
Dvce_4_0_offset.h104 #define mmVCE_RB_WPTR3 macro
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dvce_v3_0.c126 v = RREG32(mmVCE_RB_WPTR3); in vce_v3_0_ring_get_wptr()
157 WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr)); in vce_v3_0_ring_set_wptr()
296 WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr)); in vce_v3_0_start()
Dvce_v4_0.c93 return RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR3)); in vce_v4_0_ring_get_wptr()
121 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR3), in vce_v4_0_ring_set_wptr()
360 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR3), lower_32_bits(ring->wptr)); in vce_v4_0_start()