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Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_4_0_offset.h162 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 … macro
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dvce_v4_0.c255 mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), tmr_mc_addr >> 8); in vce_v4_0_sriov_start()
262 mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_sriov_start()
655 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_mc_resume()
661 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_mc_resume()
Dvce_v3_0.c48 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x8616 macro
569 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()