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Searched refs:mmVCE_CLOCK_GATING_A (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_1_0_d.h26 #define mmVCE_CLOCK_GATING_A 0x80BE macro
Dvce_2_0_d.h47 #define mmVCE_CLOCK_GATING_A 0x80be macro
Dvce_3_0_d.h47 #define mmVCE_CLOCK_GATING_A 0x80be macro
Dvce_4_0_offset.h92 #define mmVCE_CLOCK_GATING_A … macro
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dvce_v2_0.c151 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v2_0_init_cg()
155 WREG32(mmVCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
172 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v2_0_mc_resume()
Dvce_v3_0.c556 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v3_0_mc_resume()
786 uint32_t data = RREG32(mmVCE_CLOCK_GATING_A); in vce_v3_0_set_clockgating_state()
789 WREG32(mmVCE_CLOCK_GATING_A, data); in vce_v3_0_set_clockgating_state()
854 data = RREG32(mmVCE_CLOCK_GATING_A); in vce_v3_0_get_clockgating_state()
Dvce_v4_0.c639 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A), 0, ~(1 << 16)); in vce_v4_0_mc_resume()
943 uint32_t data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A);
946 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A, data);