/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
D | cik_ih.c | 386 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset() 389 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset() 390 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset() 395 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset() 396 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
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D | cz_ih.c | 383 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset() 386 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset() 387 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset() 392 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset() 393 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
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D | iceland_ih.c | 377 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset() 380 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset() 381 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset() 386 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset() 387 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
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D | tonga_ih.c | 434 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset() 437 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset() 438 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset() 443 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset() 444 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
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D | gmc_v6_0.c | 1011 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset() 1014 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset() 1015 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset() 1020 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset() 1021 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
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D | vce_v3_0.c | 685 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset() 688 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset() 689 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset() 694 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset() 695 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
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D | sdma_v2_4.c | 984 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset() 987 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset() 988 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset() 993 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset() 994 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
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D | cik_sdma.c | 1089 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset() 1092 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset() 1093 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset() 1098 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset() 1099 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
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D | vce_v4_0.c | 781 tmp = RREG32(mmSRBM_SOFT_RESET); 784 WREG32(mmSRBM_SOFT_RESET, tmp); 785 tmp = RREG32(mmSRBM_SOFT_RESET); 790 WREG32(mmSRBM_SOFT_RESET, tmp); 791 tmp = RREG32(mmSRBM_SOFT_RESET);
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D | gmc_v7_0.c | 1207 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset() 1210 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset() 1211 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset() 1216 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset() 1217 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
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D | sdma_v3_0.c | 1318 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset() 1321 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset() 1322 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset() 1327 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset() 1328 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
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D | uvd_v6_0.c | 1205 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset() 1208 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset() 1209 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset() 1214 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset() 1215 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
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D | gmc_v8_0.c | 1366 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset() 1369 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset() 1370 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset() 1375 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset() 1376 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
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D | uvd_v3_1.c | 337 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v3_1_start() 782 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v3_1_soft_reset()
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D | uvd_v4_2.c | 295 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v4_2_start() 682 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v4_2_soft_reset()
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D | uvd_v5_0.c | 348 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v5_0_start() 604 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v5_0_soft_reset()
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D | uvd_v7_0.c | 1527 tmp = RREG32(mmSRBM_SOFT_RESET); 1530 WREG32(mmSRBM_SOFT_RESET, tmp); 1531 tmp = RREG32(mmSRBM_SOFT_RESET); 1536 WREG32(mmSRBM_SOFT_RESET, tmp); 1537 tmp = RREG32(mmSRBM_SOFT_RESET);
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D | dce_v8_0.c | 2854 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset() 2857 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset() 2858 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset() 2863 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset() 2864 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
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D | dce_v10_0.c | 2962 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset() 2965 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset() 2966 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset() 2971 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset() 2972 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
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D | dce_v11_0.c | 3085 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset() 3088 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset() 3089 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset() 3094 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset() 3095 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
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/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_1_0_d.h | 262 #define mmSRBM_SOFT_RESET 0x0398 macro
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D | oss_2_4_d.h | 83 #define mmSRBM_SOFT_RESET 0x398 macro
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D | oss_3_0_1_d.h | 81 #define mmSRBM_SOFT_RESET 0x398 macro
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D | oss_2_0_d.h | 77 #define mmSRBM_SOFT_RESET 0x398 macro
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D | oss_3_0_d.h | 93 #define mmSRBM_SOFT_RESET 0x398 macro
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