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Searched refs:mmRLC_RLCV_TIMER_INT_1_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_2_1_offset.h7086 #define mmRLC_RLCV_TIMER_INT_1_BASE_IDX … macro
Dgc_10_1_0_offset.h10382 #define mmRLC_RLCV_TIMER_INT_1_BASE_IDX … macro
Dgc_10_3_0_offset.h10126 #define mmRLC_RLCV_TIMER_INT_1_BASE_IDX … macro