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Searched refs:mmOTG2_OTG_DRR_TIMING_INT_STATUS_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h7115 #define mmOTG2_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_0_2_offset.h8444 #define mmOTG2_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_0_0_offset.h9293 #define mmOTG2_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro