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Searched refs:mmMPCC4_MPCC_UPDATE_LOCK_SEL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h3717 #define mmMPCC4_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro
Ddcn_2_1_0_offset.h5745 #define mmMPCC4_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro
Ddcn_3_0_2_offset.h12607 #define mmMPCC4_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro
Ddcn_2_0_0_offset.h6683 #define mmMPCC4_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro
Ddcn_3_0_0_offset.h13891 #define mmMPCC4_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro