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Searched refs:mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h1442 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_3_0_3_offset.h2556 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_3_0_1_offset.h3367 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_1_0_offset.h3521 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_2_1_0_offset.h3373 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_3_0_2_offset.h3912 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_2_0_0_offset.h4311 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro
Ddcn_3_0_0_offset.h3958 #define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX macro