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Searched refs:mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h8577 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro
Ddcn_2_1_0_offset.h10480 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro
Ddcn_1_0_offset.h8944 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro
Ddcn_3_0_2_offset.h10192 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro
Ddcn_2_0_0_offset.h11571 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro
Ddcn_3_0_0_offset.h11327 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h10741 #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX … macro