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Searched refs:mmDCORE0_VDEC0_BRDG_CTRL_BASE (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/misc/habanalabs/include/gaudi2/asic_reg/
Dgaudi2_regs.h415 #define BRDG_CTRL_BLOCK_OFFSET (mmDCORE0_VDEC0_BRDG_CTRL_BASE - mmDCORE0_DEC0_CMD_BASE)
421 (mmDCORE0_VDEC0_BRDG_CTRL_NRM_MSIX_LBW_AWADDR - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
424 (mmDCORE0_VDEC0_BRDG_CTRL_NRM_MSIX_LBW_WDATA - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
427 (mmDCORE0_VDEC0_BRDG_CTRL_ABNRM_MSIX_LBW_AWADDR - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
430 (mmDCORE0_VDEC0_BRDG_CTRL_ABNRM_MSIX_LBW_WDATA - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
Dgaudi2_blocks_linux_driver.h10126 #define mmDCORE0_VDEC0_BRDG_CTRL_BASE 0x41E3000ull macro
/Linux-v6.1/drivers/misc/habanalabs/gaudi2/
Dgaudi2.c6589 u32 offset = (mmDCORE0_VDEC1_BRDG_CTRL_BASE - mmDCORE0_VDEC0_BRDG_CTRL_BASE) * in gaudi2_mmu_vdec_dcore_prepare()