Searched refs:mmDCORE0_MME_QM_BASE (Results 1 – 3 of 3) sorted by relevance
728 [GAUDI2_QUEUE_ID_DCORE0_MME_0_0] = mmDCORE0_MME_QM_BASE,729 [GAUDI2_QUEUE_ID_DCORE0_MME_0_1] = mmDCORE0_MME_QM_BASE,730 [GAUDI2_QUEUE_ID_DCORE0_MME_0_2] = mmDCORE0_MME_QM_BASE,731 [GAUDI2_QUEUE_ID_DCORE0_MME_0_3] = mmDCORE0_MME_QM_BASE,3188 offset = mmDCORE1_MME_QM_BASE - mmDCORE0_MME_QM_BASE; in gaudi2_stop_mme_qmans()3194 gaudi2_stop_qman_common(hdev, mmDCORE0_MME_QM_BASE + (i * offset)); in gaudi2_stop_mme_qmans()3387 offset = mmDCORE1_MME_QM_BASE - mmDCORE0_MME_QM_BASE; in gaudi2_disable_mme_qmans()3391 gaudi2_disable_qman_common(hdev, mmDCORE0_MME_QM_BASE + (i * offset)); in gaudi2_disable_mme_qmans()7625 qman_base = mmDCORE0_MME_QM_BASE + index * DCORE_OFFSET; in gaudi2_handle_qm_sei_err()7692 qman_base = mmDCORE0_MME_QM_BASE; in gaudi2_handle_qman_err()
740 mmDCORE0_MME_QM_BASE,
7759 #define mmDCORE0_MME_QM_BASE 0x40CA000ull macro
