Searched refs:jt_offset (Results 1 – 10 of 10) sorted by relevance
186 uint32_t jt_offset; /* jt location */ member205 uint32_t jt_offset; /* jt location */ member
99 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in radeon_ucode_print_gfx_hdr()149 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in radeon_ucode_print_sdma_hdr()
6434 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6440 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6446 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6452 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()6458 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()
170 uint32_t jt_offset; /* jt location */ member215 uint32_t jt_offset; /* jt location */ member294 uint32_t jt_offset; /* jt location */ member
203 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()211 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()219 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()227 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()235 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
116 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in amdgpu_ucode_print_gfx_hdr()181 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset)); in amdgpu_ucode_print_rlc_hdr()321 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in amdgpu_ucode_print_sdma_hdr()798 le32_to_cpu(cp_hdr->jt_offset) * 4; in amdgpu_ucode_init_single_fw()990 (le32_to_cpu(header->jt_offset) * 4); in amdgpu_ucode_patch_jt()
236 info->image_size = le32_to_cpu(header->jt_offset) << 2; in amdgpu_cgs_get_firmware_info()
5483 sdma_hdr->jt_offset, in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()5491 sdma_hdr->jt_offset, in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()5822 le32_to_cpup(fw_data + pfp_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_pfp_microcode()5899 le32_to_cpup(fw_data + ce_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_ce_microcode()5976 le32_to_cpup(fw_data + me_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_me_microcode()6359 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v10_0_cp_compute_load_microcode()
2612 le32_to_cpup(fw_data + pfp_hdr->jt_offset + i)); in gfx_v11_0_cp_gfx_load_pfp_microcode()2826 le32_to_cpup(fw_data + me_hdr->jt_offset + i)); in gfx_v11_0_cp_gfx_load_me_microcode()3342 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v11_0_cp_compute_load_microcode()
3228 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()3231 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v9_0_cp_compute_load_microcode()
