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Searched refs:ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h8043 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_0_1_offset.h12886 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_2_1_0_offset.h13490 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_1_0_offset.h13730 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_1_4_offset.h801 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_1_5_offset.h14806 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_1_2_offset.h14700 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_2_0_offset.h14197 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_2_1_offset.h14176 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_0_2_offset.h15775 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_1_6_offset.h15297 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_2_0_0_offset.h17154 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
Ddcn_3_0_0_offset.h17496 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h17543 #define ixAZF0ENDPOINT5_AZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 … macro