Home
last modified time | relevance | path

Searched refs:intf_cfg (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_ctl.c562 u32 intf_cfg = 0; in dpu_hw_ctl_intf_cfg() local
564 intf_cfg |= (cfg->intf & 0xF) << 4; in dpu_hw_ctl_intf_cfg()
567 intf_cfg |= BIT(19); in dpu_hw_ctl_intf_cfg()
568 intf_cfg |= (cfg->mode_3d - 0x1) << 20; in dpu_hw_ctl_intf_cfg()
572 intf_cfg |= (cfg->wb & 0x3) + 2; in dpu_hw_ctl_intf_cfg()
576 intf_cfg &= ~BIT(17); in dpu_hw_ctl_intf_cfg()
577 intf_cfg &= ~(0x3 << 15); in dpu_hw_ctl_intf_cfg()
580 intf_cfg |= BIT(17); in dpu_hw_ctl_intf_cfg()
581 intf_cfg |= ((cfg->stream_sel & 0x3) << 15); in dpu_hw_ctl_intf_cfg()
588 DPU_REG_WRITE(c, CTL_TOP, intf_cfg); in dpu_hw_ctl_intf_cfg()
Ddpu_hw_intf.c108 u32 intf_cfg, intf_cfg2 = 0; in dpu_hw_intf_setup_timing_engine() local
114 intf_cfg = DPU_REG_READ(c, INTF_CONFIG); in dpu_hw_intf_setup_timing_engine()
150 intf_cfg |= INTF_CFG_ACTIVE_H_EN; in dpu_hw_intf_setup_timing_engine()
156 intf_cfg |= INTF_CFG_ACTIVE_V_EN; in dpu_hw_intf_setup_timing_engine()
189 intf_cfg |= INTF_CFG_ACTIVE_H_EN | INTF_CFG_ACTIVE_V_EN; in dpu_hw_intf_setup_timing_engine()
234 DPU_REG_WRITE(c, INTF_CONFIG, intf_cfg); in dpu_hw_intf_setup_timing_engine()
Ddpu_encoder_phys_wb.c204 struct dpu_hw_intf_cfg intf_cfg = {0}; in dpu_encoder_phys_wb_setup_cdp() local
210 intf_cfg.intf = DPU_NONE; in dpu_encoder_phys_wb_setup_cdp()
211 intf_cfg.wb = hw_wb->idx; in dpu_encoder_phys_wb_setup_cdp()
214 intf_cfg.merge_3d = hw_pp->merge_3d->idx; in dpu_encoder_phys_wb_setup_cdp()
225 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_cdp()
227 struct dpu_hw_intf_cfg intf_cfg = {0}; in dpu_encoder_phys_wb_setup_cdp() local
229 intf_cfg.intf = DPU_NONE; in dpu_encoder_phys_wb_setup_cdp()
230 intf_cfg.wb = hw_wb->idx; in dpu_encoder_phys_wb_setup_cdp()
231 intf_cfg.mode_3d = in dpu_encoder_phys_wb_setup_cdp()
233 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_cdp()
Ddpu_encoder_phys_vid.c238 struct dpu_hw_intf_cfg intf_cfg = { 0 }; in dpu_encoder_phys_vid_setup_timing_engine() local
272 intf_cfg.intf = phys_enc->hw_intf->idx; in dpu_encoder_phys_vid_setup_timing_engine()
273 intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_VID; in dpu_encoder_phys_vid_setup_timing_engine()
274 intf_cfg.stream_sel = 0; /* Don't care value for video mode */ in dpu_encoder_phys_vid_setup_timing_engine()
275 intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); in dpu_encoder_phys_vid_setup_timing_engine()
277 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; in dpu_encoder_phys_vid_setup_timing_engine()
282 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_vid_setup_timing_engine()
292 phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, intf_cfg.mode_3d); in dpu_encoder_phys_vid_setup_timing_engine()
Ddpu_encoder_phys_cmd.c54 struct dpu_hw_intf_cfg intf_cfg = { 0 }; in _dpu_encoder_phys_cmd_update_intf_cfg() local
60 intf_cfg.intf = phys_enc->intf_idx; in _dpu_encoder_phys_cmd_update_intf_cfg()
61 intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_CMD; in _dpu_encoder_phys_cmd_update_intf_cfg()
62 intf_cfg.stream_sel = cmd_enc->stream_sel; in _dpu_encoder_phys_cmd_update_intf_cfg()
63 intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); in _dpu_encoder_phys_cmd_update_intf_cfg()
64 ctl->ops.setup_intf_cfg(ctl, &intf_cfg); in _dpu_encoder_phys_cmd_update_intf_cfg()
Ddpu_encoder.c2014 struct dpu_hw_intf_cfg intf_cfg = { 0 }; in dpu_encoder_helper_phys_cleanup() local
2061 intf_cfg.stream_sel = 0; /* Don't care value for video mode */ in dpu_encoder_helper_phys_cleanup()
2062 intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); in dpu_encoder_helper_phys_cleanup()
2065 intf_cfg.intf = phys_enc->hw_intf->idx; in dpu_encoder_helper_phys_cleanup()
2067 intf_cfg.wb = phys_enc->hw_wb->idx; in dpu_encoder_helper_phys_cleanup()
2070 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; in dpu_encoder_helper_phys_cleanup()
2073 ctl->ops.reset_intf_cfg(ctl, &intf_cfg); in dpu_encoder_helper_phys_cleanup()
/Linux-v6.1/sound/soc/qcom/qdsp6/
Daudioreach.c626 struct apm_codec_dma_module_intf_cfg *intf_cfg; in audioreach_codec_dma_set_media_format() local
672 intf_cfg = p; in audioreach_codec_dma_set_media_format()
673 param_data = &intf_cfg->param_data; in audioreach_codec_dma_set_media_format()
679 intf_cfg->cfg.lpaif_type = module->hw_interface_type; in audioreach_codec_dma_set_media_format()
680 intf_cfg->cfg.intf_index = module->hw_interface_idx; in audioreach_codec_dma_set_media_format()
681 intf_cfg->cfg.active_channels_mask = (1 << cfg->num_channels) - 1; in audioreach_codec_dma_set_media_format()
705 struct apm_i2s_module_intf_cfg *intf_cfg; in audioreach_i2s_set_media_format() local
723 intf_cfg = p; in audioreach_i2s_set_media_format()
725 param_data = &intf_cfg->param_data; in audioreach_i2s_set_media_format()
731 intf_cfg->cfg.intf_idx = module->hw_interface_idx; in audioreach_i2s_set_media_format()
[all …]