Searched refs:ih_rb_wptr (Results 1 – 5 of 5) sorted by relevance
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
D | vega10_ih.c | 56 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in vega10_ih_init_register_offset() 69 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); in vega10_ih_init_register_offset() 80 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); in vega10_ih_init_register_offset() 125 WREG32(ih_regs->ih_rb_wptr, 0); in vega10_ih_toggle_ring_interrupts() 242 WREG32(ih_regs->ih_rb_wptr, 0); in vega10_ih_enable_ring() 356 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in vega10_ih_get_wptr()
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D | vega20_ih.c | 59 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in vega20_ih_init_register_offset() 72 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); in vega20_ih_init_register_offset() 83 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); in vega20_ih_init_register_offset() 129 WREG32(ih_regs->ih_rb_wptr, 0); in vega20_ih_toggle_ring_interrupts() 246 WREG32(ih_regs->ih_rb_wptr, 0); in vega20_ih_enable_ring() 407 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in vega20_ih_get_wptr()
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D | navi10_ih.c | 58 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in navi10_ih_init_register_offset() 71 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); in navi10_ih_init_register_offset() 82 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); in navi10_ih_init_register_offset() 180 WREG32(ih_regs->ih_rb_wptr, 0); in navi10_ih_toggle_ring_interrupts() 298 WREG32(ih_regs->ih_rb_wptr, 0); in navi10_ih_enable_ring() 427 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in navi10_ih_get_wptr()
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D | ih_v6_0.c | 57 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, regIH_RB_WPTR); in ih_v6_0_init_register_offset() 70 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, regIH_RB_WPTR_RING1); in ih_v6_0_init_register_offset() 154 WREG32(ih_regs->ih_rb_wptr, 0); in ih_v6_0_toggle_ring_interrupts() 274 WREG32(ih_regs->ih_rb_wptr, 0); in ih_v6_0_enable_ring() 402 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in ih_v6_0_get_wptr()
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D | amdgpu_ih.h | 37 uint32_t ih_rb_wptr; member
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