Searched refs:hw_ctl (Results 1 – 5 of 5) sorted by relevance
199 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_wb_setup_cdp()202 (phys_enc->hw_ctl && in dpu_encoder_phys_wb_setup_cdp()203 phys_enc->hw_ctl->ops.setup_intf_cfg)) { in dpu_encoder_phys_wb_setup_cdp()225 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_cdp()226 } else if (phys_enc->hw_ctl && phys_enc->hw_ctl->ops.setup_intf_cfg) { in dpu_encoder_phys_wb_setup_cdp()233 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_cdp()297 struct dpu_hw_ctl *hw_ctl; in _dpu_encoder_phys_wb_update_flush() local306 hw_ctl = phys_enc->hw_ctl; in _dpu_encoder_phys_wb_update_flush()310 if (!hw_ctl) { in _dpu_encoder_phys_wb_update_flush()315 if (hw_ctl->ops.update_pending_flush_wb) in _dpu_encoder_phys_wb_update_flush()[all …]
240 if (!phys_enc->hw_ctl->ops.setup_intf_cfg) { in dpu_encoder_phys_vid_setup_timing_engine()282 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_vid_setup_timing_engine()302 struct dpu_hw_ctl *hw_ctl; in dpu_encoder_phys_vid_vblank_irq() local306 hw_ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_vblank_irq()322 if (hw_ctl->ops.get_flush_register) in dpu_encoder_phys_vid_vblank_irq()323 flush_register = hw_ctl->ops.get_flush_register(hw_ctl); in dpu_encoder_phys_vid_vblank_irq()325 if (!(flush_register & hw_ctl->ops.get_pending_flush(hw_ctl))) in dpu_encoder_phys_vid_vblank_irq()408 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_enable()480 struct dpu_hw_ctl *hw_ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_wait_for_commit_done() local483 if (!hw_ctl) in dpu_encoder_phys_vid_wait_for_commit_done()[all …]
1027 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local1059 drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); in dpu_encoder_virt_atomic_mode_set()1088 cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); in dpu_encoder_virt_atomic_mode_set()1105 if (!hw_ctl[i]) { in dpu_encoder_virt_atomic_mode_set()1112 phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]); in dpu_encoder_virt_atomic_mode_set()1465 ctl = phys->hw_ctl; in _dpu_encoder_trigger_flush()1512 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_trigger_start()1552 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_hw_reset()1597 ctl = phys->hw_ctl; in _dpu_encoder_kickoff_phys()1645 ctl = phys->hw_ctl; in dpu_encoder_trigger_kickoff_pending()[all …]
56 ctl = phys_enc->hw_ctl; in _dpu_encoder_phys_cmd_update_intf_cfg()150 phys_enc->irq[INTR_IDX_CTL_START] = phys_enc->hw_ctl->caps->intr_start; in dpu_encoder_phys_cmd_atomic_mode_set()192 phys_enc->hw_ctl->idx - CTL_0, in _dpu_encoder_phys_cmd_handle_ppdone_timeout()405 if (!phys_enc->hw_pp || !phys_enc->hw_ctl->ops.setup_intf_cfg) { in _dpu_encoder_phys_cmd_pingpong_config()445 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_cmd_enable_helper()532 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_cmd_disable()690 if (phys_enc->hw_ctl->ops.is_started(phys_enc->hw_ctl)) in dpu_encoder_phys_cmd_wait_for_commit_done()
204 struct dpu_hw_ctl *hw_ctl; member
