Searched refs:fw_based (Results 1 – 7 of 7) sorted by relevance
1217 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v1_0_pause_dpg_mode()1219 adev->vcn.inst[inst_idx].pause_state.fw_based, in vcn_v1_0_pause_dpg_mode()1221 new_state->fw_based, new_state->jpeg); in vcn_v1_0_pause_dpg_mode()1226 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v1_0_pause_dpg_mode()1269 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v1_0_pause_dpg_mode()1275 adev->vcn.inst[inst_idx].pause_state.fw_based, in vcn_v1_0_pause_dpg_mode()1277 new_state->fw_based, new_state->jpeg); in vcn_v1_0_pause_dpg_mode()1798 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_idle_work_handler()1800 new_state.fw_based = VCN_DPG_STATE__UNPAUSE; in vcn_v1_0_idle_work_handler()1860 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_set_pg_for_begin_use()[all …]
1104 struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE}; in vcn_v2_0_stop_dpg_mode()1208 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v2_0_pause_dpg_mode()1210 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v2_0_pause_dpg_mode()1214 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v2_0_pause_dpg_mode()1271 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v2_0_pause_dpg_mode()
1498 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v4_0_pause_dpg_mode()1500 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v4_0_pause_dpg_mode()1504 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v4_0_pause_dpg_mode()1526 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v4_0_pause_dpg_mode()
464 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_idle_work_handler()466 new_state.fw_based = VCN_DPG_STATE__UNPAUSE; in amdgpu_vcn_idle_work_handler()510 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_ring_begin_use()519 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_ring_begin_use()521 new_state.fw_based = VCN_DPG_STATE__UNPAUSE; in amdgpu_vcn_ring_begin_use()
1492 struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE}; in vcn_v3_0_stop_dpg_mode()1605 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v3_0_pause_dpg_mode()1607 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v3_0_pause_dpg_mode()1611 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v3_0_pause_dpg_mode()1670 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v3_0_pause_dpg_mode()
1410 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v2_5_pause_dpg_mode()1412 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v2_5_pause_dpg_mode()1416 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v2_5_pause_dpg_mode()1471 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v2_5_pause_dpg_mode()
203 enum internal_dpg_state fw_based; member