/Linux-v6.1/drivers/nvmem/ |
D | apple-efuses.c | 15 void __iomem *fuses; member 25 *dst++ = readl_relaxed(priv->fuses + offset); in apple_efuses_read() 52 priv->fuses = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in apple_efuses_probe() 53 if (IS_ERR(priv->fuses)) in apple_efuses_probe() 54 return PTR_ERR(priv->fuses); in apple_efuses_probe()
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/Linux-v6.1/drivers/crypto/qat/qat_c62x/ |
D | adf_c62x_hw_data.c | 25 u32 fuses = self->fuses; in get_accel_mask() local 28 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask() 37 u32 fuses = self->fuses; in get_ae_mask() local 48 return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK; in get_ae_mask()
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D | adf_drv.c | 129 &hw_data->fuses); in adf_probe() 178 i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0; in adf_probe()
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/Linux-v6.1/drivers/crypto/qat/qat_c3xxx/ |
D | adf_c3xxx_hw_data.c | 25 u32 fuses = self->fuses; in get_accel_mask() local 28 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask() 37 u32 fuses = self->fuses; in get_ae_mask() local 48 return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK; in get_ae_mask()
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D | adf_drv.c | 129 &hw_data->fuses); in adf_probe()
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/Linux-v6.1/drivers/crypto/qat/qat_dh895xcc/ |
D | adf_dh895xcc_hw_data.c | 27 u32 fuses = self->fuses; in get_accel_mask() local 29 return ~fuses >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & in get_accel_mask() 35 u32 fuses = self->fuses; in get_ae_mask() local 37 return ~fuses & ADF_DH895XCC_ACCELENGINES_MASK; in get_ae_mask() 89 int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) in get_sku()
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D | adf_drv.c | 129 &hw_data->fuses); in adf_probe()
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/Linux-v6.1/drivers/soc/qcom/ |
D | cpr.c | 809 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local 813 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx() 814 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data); in cpr_populate_ring_osc_idx() 851 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local 872 for (i = 0; fuse <= end; fuse++, fuses++, i++, fdata++) { in cpr_fuse_corner_init() 882 uV = cpr_read_fuse_uV(desc, fdata, fuses->init_voltage, in cpr_fuse_corner_init() 902 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot); in cpr_fuse_corner_init() 1079 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_corner_init() local 1177 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init() 1230 struct cpr_fuse *fuses; in cpr_get_fuses() local [all …]
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/Linux-v6.1/drivers/crypto/qat/qat_common/ |
D | adf_gen2_hw_data.c | 216 u32 fuses = hw_data->fuses; in adf_gen2_get_accel_cap() local 241 if ((straps | fuses) & ADF_POWERGATE_PKE) in adf_gen2_get_accel_cap() 244 if ((straps | fuses) & ADF_POWERGATE_DC) in adf_gen2_get_accel_cap()
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D | adf_accel_devices.h | 207 u32 fuses; member
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/Linux-v6.1/Documentation/devicetree/bindings/cpufreq/ |
D | imx-cpufreq-dt.txt | 5 "speed grading" value which are written in fuses. These bits are combined with
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/Linux-v6.1/drivers/crypto/qat/qat_4xxx/ |
D | adf_4xxx_hw_data.c | 83 u32 me_disable = self->fuses; in get_ae_mask()
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D | adf_drv.c | 215 pci_read_config_dword(pdev, ADF_4XXX_FUSECTL4_OFFSET, &hw_data->fuses); in adf_probe()
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/Linux-v6.1/arch/arm/boot/dts/ |
D | tegra30-asus-tf201.dts | 590 /delete-property/ nvidia,xcvr-setup-use-fuses; 595 /delete-property/ nvidia,xcvr-setup-use-fuses;
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D | tegra30.dtsi | 1148 nvidia,xcvr-setup-use-fuses; 1191 nvidia,xcvr-setup-use-fuses; 1233 nvidia,xcvr-setup-use-fuses;
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D | tegra20-asus-tf101.dts | 876 nvidia,xcvr-setup-use-fuses; 889 nvidia,xcvr-setup-use-fuses;
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D | tegra20-acer-a500-picasso.dts | 741 nvidia,xcvr-setup-use-fuses; 752 nvidia,xcvr-setup-use-fuses;
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/Linux-v6.1/drivers/nvme/target/ |
D | passthru.c | 138 id->fuses = 0; in nvmet_passthru_override_id_ctrl()
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/Linux-v6.1/Documentation/security/keys/ |
D | trusted-encrypted.rst | 36 fuses and is accessible to TEE only.
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/Linux-v6.1/include/linux/ |
D | nvme.h | 331 __le16 fuses; member
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