| /Linux-v6.1/Documentation/admin-guide/hw-vuln/ |
| D | l1tf.rst | 148 'L1D vulnerable' L1D flushing is disabled 191 The conditional mode avoids L1D flushing after VMEXITs which execute 373 the hypervisors, i.e. unconditional L1D flushing 386 mitigation, i.e. conditional L1D flushing 395 i.e. conditional L1D flushing. 413 The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`. 421 The KVM hypervisor mitigation mechanism, flushing the L1D cache when 466 To avoid the overhead of the default L1D flushing on VMENTER the 467 administrator can disable the flushing via the kernel command line and 479 the kernel, it's only required to enforce L1D flushing on VMENTER. [all …]
|
| D | l1d_flush.rst | 38 If the underlying CPU supports L1D flushing in hardware, the hardware 66 **NOTE** : The opt-in of a task for L1D flushing works only when the task's 68 requested L1D flushing is scheduled on a SMT-enabled core the kernel sends
|
| /Linux-v6.1/Documentation/core-api/ |
| D | cachetlb.rst | 7 This document describes the cache/tlb flushing interfaces called 17 thinking SMP cache/tlb flushing must be so inefficient, this is in 23 First, the TLB flushing interfaces, since they are the simplest. The 56 Here we are flushing a specific range of (user) virtual 104 Next, we have the cache flushing interfaces. In general, when Linux 126 The cache flushing routines below need only deal with cache flushing 161 Here we are flushing a specific range of (user) virtual 211 Here in these two interfaces we are flushing a specific range 332 optimise for flushing the entire folio of pages instead 333 of flushing one page at a time. [all …]
|
| /Linux-v6.1/drivers/accessibility/speakup/ |
| D | speakup_soft.c | 231 if (!synth_buffer_empty() || speakup_info.flushing) in softsynthx_read() 255 if (speakup_info.flushing) { in softsynthx_read() 256 speakup_info.flushing = 0; in softsynthx_read() 352 (!synth_buffer_empty() || speakup_info.flushing)) in softsynth_poll()
|
| D | synth.c | 41 .flushing = 0, 78 if (speakup_info.flushing) { in _spk_do_catch_up() 79 speakup_info.flushing = 0; in _spk_do_catch_up() 199 speakup_info.flushing = 1; in spk_do_flush()
|
| D | speakup_apollo.c | 150 if (speakup_info.flushing) { in do_catch_up() 151 speakup_info.flushing = 0; in do_catch_up()
|
| D | speakup_decext.c | 165 if (speakup_info.flushing) { in do_catch_up() 166 speakup_info.flushing = 0; in do_catch_up()
|
| D | thread.c | 35 (speakup_info.flushing || in speakup_thread()
|
| D | speakup_keypc.c | 187 if (speakup_info.flushing) { in do_catch_up() 188 speakup_info.flushing = 0; in do_catch_up()
|
| D | speakup_acntpc.c | 186 if (speakup_info.flushing) { in do_catch_up() 187 speakup_info.flushing = 0; in do_catch_up()
|
| D | speakup_dectlk.c | 241 if (speakup_info.flushing) { in do_catch_up() 242 speakup_info.flushing = 0; in do_catch_up()
|
| D | speakup_dtlk.c | 199 if (speakup_info.flushing) { in do_catch_up() 200 speakup_info.flushing = 0; in do_catch_up()
|
| D | speakup_decpc.c | 383 if (speakup_info.flushing) { in do_catch_up() 384 speakup_info.flushing = 0; in do_catch_up()
|
| D | spk_types.h | 221 int flushing; member
|
| /Linux-v6.1/drivers/infiniband/hw/mlx4/ |
| D | mcg.c | 686 } else if (method == IB_SA_METHOD_DELETE_RESP && group->demux->flushing) in mlx4_ib_mcg_work_handler() 941 if (ctx->flushing) in mlx4_ib_mcg_multiplex_handler() 1065 ctx->flushing = 0; in mlx4_ib_mcg_port_init() 1134 cw->ctx->flushing = 0; in mcg_clean_task() 1142 if (ctx->flushing) in mlx4_ib_mcg_port_cleanup() 1145 ctx->flushing = 1; in mlx4_ib_mcg_port_cleanup() 1149 ctx->flushing = 0; in mlx4_ib_mcg_port_cleanup() 1155 ctx->flushing = 0; in mlx4_ib_mcg_port_cleanup()
|
| /Linux-v6.1/Documentation/x86/ |
| D | pti.rst | 96 allows us to skip flushing the entire TLB when switching page 119 h. INVPCID is a TLB-flushing instruction which allows flushing 123 flushing a kernel address, we need to flush all PCIDs, so a 124 single kernel address flush will require a TLB-flushing CR3
|
| D | tlb.rst | 22 address space is obviously better performed by flushing the
|
| /Linux-v6.1/Documentation/ABI/testing/ |
| D | procfs-diskstats | 40 20 time spent flushing
|
| /Linux-v6.1/Documentation/block/ |
| D | writeback_cache_control.rst | 45 worry if the underlying devices need any explicit cache flushing and how 71 driver needs to tell the block layer that it supports flushing caches by
|
| /Linux-v6.1/drivers/char/xillybus/ |
| D | xillyusb.c | 141 unsigned int flushing; member 911 chan->flushing = 0; in process_in_opcode() 1135 if (chan->flushing) { in flush_downstream() 1164 chan->flushing = 1; in flush_downstream() 1182 while (chan->flushing) { in flush_downstream() 1184 !chan->flushing || in flush_downstream() 1196 while (chan->flushing) { in flush_downstream() 1203 !chan->flushing || in flush_downstream()
|
| /Linux-v6.1/include/trace/events/ |
| D | jbd2.h | 261 __field( unsigned long, flushing ) 275 __entry->flushing = stats->rs_flushing; 290 jiffies_to_msecs(__entry->flushing),
|
| /Linux-v6.1/fs/xfs/ |
| D | xfs_trans_ail.c | 428 int flushing = 0; in xfsaild_push() local 508 flushing++; in xfsaild_push() 569 } else if (((stuck + flushing) * 100) / count > 90) { in xfsaild_push()
|
| /Linux-v6.1/fs/ceph/ |
| D | caps.c | 1344 int flushing, u64 flush_tid, u64 oldest_flush_tid) in __prep_cap() argument 1377 arg->follows = flushing ? ci->i_head_snapc->seq : 0; in __prep_cap() 1391 if (flushing & CEPH_CAP_XATTR_EXCL) { in __prep_cap() 1409 arg->dirty = flushing; in __prep_cap() 1812 int flushing; in __mark_caps_flushing() local 1819 flushing = ci->i_dirty_caps; in __mark_caps_flushing() 1821 ceph_cap_string(flushing), in __mark_caps_flushing() 1823 ceph_cap_string(ci->i_flushing_caps | flushing)); in __mark_caps_flushing() 1824 ci->i_flushing_caps |= flushing; in __mark_caps_flushing() 1829 cf->caps = flushing; in __mark_caps_flushing() [all …]
|
| /Linux-v6.1/Documentation/admin-guide/device-mapper/ |
| D | log-writes.rst | 20 to make it easier to detect improper waiting/flushing. 39 Any REQ_FUA requests bypass this flushing mechanism and are logged as soon as
|
| /Linux-v6.1/arch/arm/mm/ |
| D | cache-v7.S | 102 bne start_flush_levels @ LoU != 0, start flushing 110 beq start_flush_levels @ start flushing cache levels
|