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Searched refs:enable_reg (Results 1 – 25 of 280) sorted by relevance

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/Linux-v6.1/drivers/clk/qcom/
Dgcc-msm8660.c46 .enable_reg = 0x34c0,
125 .enable_reg = 0x29d4,
141 .enable_reg = 0x29d4,
176 .enable_reg = 0x29f4,
192 .enable_reg = 0x29f4,
227 .enable_reg = 0x2a14,
243 .enable_reg = 0x2a14,
278 .enable_reg = 0x2a34,
294 .enable_reg = 0x2a34,
329 .enable_reg = 0x2a54,
[all …]
Dgcc-mdm9615.c57 .enable_reg = 0x34c0,
68 .enable_reg = 0x34c0,
95 .enable_reg = 0x34c0,
122 .enable_reg = 0x34c0,
205 .enable_reg = 0x29d4,
221 .enable_reg = 0x29d4,
256 .enable_reg = 0x29f4,
272 .enable_reg = 0x29f4,
307 .enable_reg = 0x2a14,
323 .enable_reg = 0x2a14,
[all …]
Dgcc-sm8250.c39 .enable_reg = 0x52018,
78 .enable_reg = 0x52018,
95 .enable_reg = 0x52018,
1061 .enable_reg = 0x9000c,
1076 .enable_reg = 0x750cc,
1096 .enable_reg = 0x770cc,
1114 .enable_reg = 0xf080,
1132 .enable_reg = 0x10080,
1152 .enable_reg = 0x52000,
1165 .enable_reg = 0xb02c,
[all …]
Dgcc-ipq806x.c49 .enable_reg = 0x34c0,
78 .enable_reg = 0x34c0,
105 .enable_reg = 0x34c0,
212 .enable_reg = 0x34c0,
430 .enable_reg = 0x29d4,
446 .enable_reg = 0x29d4,
481 .enable_reg = 0x29f4,
497 .enable_reg = 0x29f4,
532 .enable_reg = 0x2a34,
548 .enable_reg = 0x2a34,
[all …]
Dmmcc-apq8084.c232 .enable_reg = 0x0100,
259 .enable_reg = 0x0100,
1104 .enable_reg = 0x5104,
1119 .enable_reg = 0x5100,
1136 .enable_reg = 0x2414,
1153 .enable_reg = 0x2418,
1170 .enable_reg = 0x2410,
1187 .enable_reg = 0x241c,
1204 .enable_reg = 0x2420,
1221 .enable_reg = 0x2404,
[all …]
Dgcc-sm8150.c41 .enable_reg = 0x52000,
84 .enable_reg = 0x52000,
102 .enable_reg = 0x52000,
1113 .enable_reg = 0x90018,
1128 .enable_reg = 0x750c0,
1147 .enable_reg = 0x750c0,
1166 .enable_reg = 0x770c0,
1185 .enable_reg = 0x770c0,
1202 .enable_reg = 0xf07c,
1219 .enable_reg = 0x1007c,
[all …]
Dgcc-msm8960.c47 .enable_reg = 0x34c0,
78 .enable_reg = 0x34c0,
277 .enable_reg = 0x34c0,
369 .enable_reg = 0x29d4,
385 .enable_reg = 0x29d4,
420 .enable_reg = 0x29f4,
436 .enable_reg = 0x29f4,
471 .enable_reg = 0x2a14,
487 .enable_reg = 0x2a14,
522 .enable_reg = 0x2a34,
[all …]
Dgcc-sc8180x.c53 .enable_reg = 0x52000,
95 .enable_reg = 0x52000,
114 .enable_reg = 0x52000,
133 .enable_reg = 0x52000,
1365 .enable_reg = 0x90018,
1380 .enable_reg = 0x750c0,
1400 .enable_reg = 0x750c0,
1420 .enable_reg = 0x770c0,
1440 .enable_reg = 0x770c0,
1458 .enable_reg = 0xa6084,
[all …]
Dgcc-sc8280xp.c115 .enable_reg = 0x52028,
152 .enable_reg = 0x52028,
167 .enable_reg = 0x52028,
182 .enable_reg = 0x52028,
197 .enable_reg = 0x52028,
212 .enable_reg = 0x52028,
2528 .enable_reg = 0x52018,
2543 .enable_reg = 0x52018,
2558 .enable_reg = 0x52000,
2573 .enable_reg = 0x52018,
[all …]
Dgcc-ipq8074.c399 .enable_reg = 0x0b000,
444 .enable_reg = 0x0b000,
477 .enable_reg = 0x0b000,
511 .enable_reg = 0x0b000,
559 .enable_reg = 0x0b000,
591 .enable_reg = 0x0b000,
657 .enable_reg = 0x30000,
1255 .enable_reg = 0x30018,
2029 .enable_reg = 0x01008,
2046 .enable_reg = 0x02008,
[all …]
Dgcc-sm6350.c38 .enable_reg = 0x52010,
99 .enable_reg = 0x52010,
138 .enable_reg = 0x52010,
797 .enable_reg = 0x3e014,
817 .enable_reg = 0x3e014,
837 .enable_reg = 0x3e014,
857 .enable_reg = 0x3e010,
877 .enable_reg = 0x52000,
892 .enable_reg = 0x17008,
908 .enable_reg = 0x17018,
[all …]
Dgcc-apq8084.c118 .enable_reg = 0x1480,
181 .enable_reg = 0x1480,
208 .enable_reg = 0x1480,
280 .enable_reg = 0x1bd0,
297 .enable_reg = 0x1bcc,
1323 .enable_reg = 0x1f14,
1377 .enable_reg = 0x1484,
1394 .enable_reg = 0x1484,
1410 .enable_reg = 0x0648,
1427 .enable_reg = 0x0644,
[all …]
Dgcc-qcs404.c292 .enable_reg = 0x45008,
309 .enable_reg = 0x45000,
326 .enable_reg = 0x45000,
342 .enable_reg = 0x45000,
388 .enable_reg = 0x45000,
416 .enable_reg = 0x45000,
1237 .enable_reg = 0x45004,
1255 .enable_reg = 0x4500c,
1268 .enable_reg = 0x59034,
1285 .enable_reg = 0x59030,
[all …]
Dgcc-sm8450.c42 .enable_reg = 0x62018,
81 .enable_reg = 0x62018,
98 .enable_reg = 0x62018,
1088 .enable_reg = 0x62000,
1103 .enable_reg = 0x62000,
1118 .enable_reg = 0x870d4,
1138 .enable_reg = 0x870d4,
1158 .enable_reg = 0x49088,
1178 .enable_reg = 0x62000,
1193 .enable_reg = 0x36010,
[all …]
Dmmcc-msm8960.c195 .enable_reg = 0x0140,
210 .enable_reg = 0x0140,
246 .enable_reg = 0x0154,
261 .enable_reg = 0x0154,
297 .enable_reg = 0x0220,
312 .enable_reg = 0x0220,
354 .enable_reg = 0x0040,
369 .enable_reg = 0x0040,
387 .enable_reg = 0x0040,
422 .enable_reg = 0x0024,
[all …]
Dgcc-sm6125.c46 .enable_reg = 0x79000,
89 .enable_reg = 0x79000,
106 .enable_reg = 0x79000,
123 .enable_reg = 0x79000,
140 .enable_reg = 0x79000,
170 .enable_reg = 0x79000,
200 .enable_reg = 0x79000,
230 .enable_reg = 0x79000,
1364 .enable_reg = 0x1d004,
1379 .enable_reg = 0x1d008,
[all …]
Dgcc-sc7180.c40 .enable_reg = 0x52010,
93 .enable_reg = 0x52010,
111 .enable_reg = 0x52010,
129 .enable_reg = 0x52010,
147 .enable_reg = 0x52010,
847 .enable_reg = 0x82024,
865 .enable_reg = 0x8201c,
885 .enable_reg = 0x52000,
898 .enable_reg = 0xb020,
913 .enable_reg = 0xb080,
[all …]
Dgcc-msm8976.c74 .enable_reg = 0x45000,
107 .enable_reg = 0x45000,
144 .enable_reg = 0x45000,
191 .enable_reg = 0x45000,
222 .enable_reg = 0x45000,
1657 .enable_reg = 0x78004,
1674 .enable_reg = 0x79004,
1692 .enable_reg = 0x2008,
1710 .enable_reg = 0x2004,
1728 .enable_reg = 0x3010,
[all …]
Dgcc-msm8998.c39 .enable_reg = 0x52000,
110 .enable_reg = 0x52000,
181 .enable_reg = 0x52000,
252 .enable_reg = 0x52000,
323 .enable_reg = 0x52000,
1232 .enable_reg = 0x8202c,
1245 .enable_reg = 0x82028,
1263 .enable_reg = 0x82024,
1281 .enable_reg = 0x48090,
1294 .enable_reg = 0x48094,
[all …]
Dgcc-sc7280.c47 .enable_reg = 0x52010,
108 .enable_reg = 0x52010,
125 .enable_reg = 0x52010,
142 .enable_reg = 0x52010,
159 .enable_reg = 0x52010,
175 .enable_reg = 0x52000,
1233 .enable_reg = 0x8c004,
1246 .enable_reg = 0x8c008,
1261 .enable_reg = 0x52000,
1276 .enable_reg = 0x52000,
[all …]
Dgcc-sdm845.c42 .enable_reg = 0x52000,
59 .enable_reg = 0x52000,
76 .enable_reg = 0x52000,
1136 .enable_reg = 0x90014,
1151 .enable_reg = 0x82028,
1171 .enable_reg = 0x82024,
1189 .enable_reg = 0x8201c,
1207 .enable_reg = 0x82020,
1225 .enable_reg = 0x7a050,
1245 .enable_reg = 0x52004,
[all …]
Dgcc-sm8350.c47 .enable_reg = 0x52018,
86 .enable_reg = 0x52018,
104 .enable_reg = 0x52018,
1279 .enable_reg = 0x52000,
1293 .enable_reg = 0x52000,
1308 .enable_reg = 0x52000,
1323 .enable_reg = 0x750cc,
1343 .enable_reg = 0x750cc,
1363 .enable_reg = 0x770cc,
1383 .enable_reg = 0x770cc,
[all …]
Dgcc-msm8996.c53 .enable_reg = 0x52000,
95 .enable_reg = 0x5200c,
112 .enable_reg = 0x5200c,
130 .enable_reg = 0x52000,
1246 .enable_reg = 0x0f03c,
1263 .enable_reg = 0x75038,
1280 .enable_reg = 0x6010,
1297 .enable_reg = 0x9008,
1314 .enable_reg = 0x9010,
1327 .enable_reg = 0x0f008,
[all …]
Dmmcc-msm8974.c180 .enable_reg = 0x0100,
207 .enable_reg = 0x0100,
974 .enable_reg = 0x3348,
990 .enable_reg = 0x3344,
1007 .enable_reg = 0x30bc,
1023 .enable_reg = 0x30b4,
1040 .enable_reg = 0x30c4,
1057 .enable_reg = 0x30e4,
1074 .enable_reg = 0x30d4,
1091 .enable_reg = 0x3128,
[all …]
/Linux-v6.1/arch/arm/mach-omap1/
Dclock.c49 unsigned int val = __raw_readl(clk->enable_reg); in omap1_uart_recalc()
194 regval32 = __raw_readl(clk->enable_reg); in omap1_clk_is_enabled()
196 regval32 = __raw_readw(clk->enable_reg); in omap1_clk_is_enabled()
395 val |= __raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit); in omap1_set_uart_rate()
396 __raw_writel(val, clk->enable_reg); in omap1_set_uart_rate()
422 ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; in omap1_set_ext_clk_rate()
423 __raw_writew(ratio_bits, clk->enable_reg); in omap1_set_ext_clk_rate()
489 ratio_bits = __raw_readw(clk->enable_reg) & ~1; in omap1_init_ext_clk()
490 __raw_writew(ratio_bits, clk->enable_reg); in omap1_init_ext_clk()
534 if (unlikely(clk->enable_reg == NULL)) { in omap1_clk_enable_generic()
[all …]

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