Searched refs:div_sel0 (Results 1 – 1 of 1) sorted by relevance
65 u32 div_sel0; member700 data->div_sel0 = readl(data->reg + DIV_SEL0); in armada_3700_periph_clock_suspend()715 writel(data->div_sel0, data->reg + DIV_SEL0); in armada_3700_periph_clock_resume()
