Searched refs:dclk_min_div (Results 1 – 4 of 4) sorted by relevance
370 tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; in sun4i_tcon0_mode_set_cpu()439 tcon->dclk_min_div = 7; in sun4i_tcon0_mode_set_lvds()516 tcon->dclk_min_div = tcon->quirks->dclk_min_div; in sun4i_tcon0_mode_set_rgb()1460 .dclk_min_div = 4,1467 .dclk_min_div = 4,1476 .dclk_min_div = 1,1484 .dclk_min_div = 1,1491 .dclk_min_div = 4,1500 .dclk_min_div = 4,1508 .dclk_min_div = 1,[all …]
246 u8 dclk_min_div; /* minimum divider for TCON0 DCLK */ member273 u8 dclk_min_div; member
79 for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) { in sun4i_dclk_round_rate()
121 tcon->dclk_min_div = 6; in sun4i_rgb_mode_valid()
