Searched refs:current_sclk (Results 1 – 22 of 22) sorted by relevance
206 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()223 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()227 rdev->pm.current_sclk = sclk; in radeon_set_power_state()1295 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()1363 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()1426 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()1938 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info_show()
1361 u32 current_sclk; in trinity_patch_thermal_state() local1366 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()1369 current_sclk = pi->boot_pl.sclk; in trinity_patch_thermal_state()1374 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()1375 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1049 u32 current_sclk; in sumo_patch_thermal_state() local1054 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()1057 current_sclk = pi->boot_pl.sclk; in sumo_patch_thermal_state()1062 if (ps->levels[0].sclk > current_sclk) in sumo_patch_thermal_state()1063 ps->levels[0].sclk = current_sclk; in sumo_patch_thermal_state()
345 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_get_clock_info()
591 *value = rdev->pm.current_sclk / 100; in radeon_info_ioctl()
233 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale()
294 selected_sclk = rdev->pm.current_sclk; in rs690_crtc_bandwidth_compute()
727 u32 sclk = rdev->pm.current_sclk; in radeon_update_bandwidth_info()
946 selected_sclk = rdev->pm.current_sclk; in rv515_crtc_bandwidth_compute()
2189 wm_high.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()2216 wm_low.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()
2331 wm_high.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()2358 wm_low.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()
1652 u32 current_sclk; member
9256 wm_high.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()9296 wm_low.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()
317 u32 current_sclk; member
595 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atomfirmware_get_clock_info()
860 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v6_0_program_watermarks()887 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v6_0_program_watermarks()
988 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()1027 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()
1053 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()1092 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()
1079 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()1118 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()
702 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atombios_get_clock_info()
3016 adev->pm.current_sclk = adev->clock.default_sclk; in kv_dpm_sw_init()
7752 adev->pm.current_sclk = adev->clock.default_sclk; in si_dpm_sw_init()
