| /Linux-v6.1/drivers/gpu/drm/i915/display/ |
| D | intel_color.c | 33 int (*color_check)(struct intel_crtc_state *crtc_state);
41 void (*color_commit_noarm)(const struct intel_crtc_state *crtc_state);
49 void (*color_commit_arm)(const struct intel_crtc_state *crtc_state);
56 void (*load_luts)(const struct intel_crtc_state *crtc_state);
57 void (*read_luts)(struct intel_crtc_state *crtc_state);
150 static bool crtc_state_is_legacy_gamma(const struct intel_crtc_state *crtc_state) in crtc_state_is_legacy_gamma() argument
152 return !crtc_state->hw.degamma_lut && in crtc_state_is_legacy_gamma()
153 !crtc_state->hw.ctm && in crtc_state_is_legacy_gamma()
154 crtc_state->hw.gamma_lut && in crtc_state_is_legacy_gamma()
155 lut_is_legacy(crtc_state->hw.gamma_lut); in crtc_state_is_legacy_gamma()
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| D | intel_modeset_setup.c | 39 struct intel_crtc_state *crtc_state = in intel_crtc_disable_noatomic() local
47 if (!crtc_state->hw.active) in intel_crtc_disable_noatomic()
86 drm_atomic_set_mode_for_crtc(&crtc_state->uapi, NULL) < 0); in intel_crtc_disable_noatomic()
87 crtc_state->uapi.active = false; in intel_crtc_disable_noatomic()
88 crtc_state->uapi.connector_mask = 0; in intel_crtc_disable_noatomic()
89 crtc_state->uapi.encoder_mask = 0; in intel_crtc_disable_noatomic()
90 intel_crtc_free_hw_state(crtc_state); in intel_crtc_disable_noatomic()
91 memset(&crtc_state->hw, 0, sizeof(crtc_state->hw)); in intel_crtc_disable_noatomic()
98 intel_disable_shared_dpll(crtc_state); in intel_crtc_disable_noatomic()
129 const struct intel_crtc_state *crtc_state = in intel_modeset_update_connector_atomic_state() local
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| D | intel_vrr.c | 75 static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state) in intel_vrr_vblank_exit_length() argument
77 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_vrr_vblank_exit_length()
82 return crtc_state->vrr.guardband + crtc_state->framestart_delay + 1; in intel_vrr_vblank_exit_length()
84 return crtc_state->vrr.pipeline_full + crtc_state->framestart_delay + 1; in intel_vrr_vblank_exit_length()
87 int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state) in intel_vrr_vmin_vblank_start() argument
90 return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state); in intel_vrr_vmin_vblank_start()
93 int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state) in intel_vrr_vmax_vblank_start() argument
95 return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state); in intel_vrr_vmax_vblank_start()
99 intel_vrr_compute_config(struct intel_crtc_state *crtc_state, in intel_vrr_compute_config() argument
102 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_vrr_compute_config()
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| D | intel_dpll.c | 405 const struct intel_crtc_state *crtc_state, in i9xx_select_p2_div() argument
408 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in i9xx_select_p2_div()
410 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { in i9xx_select_p2_div()
439 struct intel_crtc_state *crtc_state, in i9xx_find_best_dpll() argument
444 struct drm_device *dev = crtc_state->uapi.crtc->dev; in i9xx_find_best_dpll()
450 clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); in i9xx_find_best_dpll()
497 struct intel_crtc_state *crtc_state, in pnv_find_best_dpll() argument
502 struct drm_device *dev = crtc_state->uapi.crtc->dev; in pnv_find_best_dpll()
508 clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); in pnv_find_best_dpll()
553 struct intel_crtc_state *crtc_state, in g4x_find_best_dpll() argument
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| D | intel_atomic.c | 124 struct drm_crtc_state *crtc_state; in intel_digital_connector_atomic_check() local
131 crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc); in intel_digital_connector_atomic_check()
145 crtc_state->mode_changed = true; in intel_digital_connector_atomic_check()
201 struct intel_crtc_state *crtc_state; in intel_any_crtc_needs_modeset() local
204 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_any_crtc_needs_modeset()
205 if (intel_crtc_needs_modeset(crtc_state)) in intel_any_crtc_needs_modeset()
239 struct intel_crtc_state *crtc_state; in intel_crtc_duplicate_state() local
241 crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL); in intel_crtc_duplicate_state()
242 if (!crtc_state) in intel_crtc_duplicate_state()
245 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi); in intel_crtc_duplicate_state()
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| D | intel_ddi_buf_trans.c | 1068 const struct intel_crtc_state *crtc_state, in hsw_get_buf_trans() argument
1071 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in hsw_get_buf_trans()
1073 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in hsw_get_buf_trans()
1081 const struct intel_crtc_state *crtc_state, in bdw_get_buf_trans() argument
1084 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in bdw_get_buf_trans()
1086 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in bdw_get_buf_trans()
1088 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in bdw_get_buf_trans()
1116 const struct intel_crtc_state *crtc_state, in skl_y_get_buf_trans() argument
1119 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_y_get_buf_trans()
1121 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in skl_y_get_buf_trans()
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| D | intel_ddi.c | 112 const struct intel_crtc_state *crtc_state) in hsw_prepare_dp_ddi_buffers() argument
120 trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_prepare_dp_ddi_buffers()
143 const struct intel_crtc_state *crtc_state) in hsw_prepare_hdmi_ddi_buffers() argument
146 int level = intel_ddi_level(encoder, crtc_state, 0); in hsw_prepare_hdmi_ddi_buffers()
152 trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_prepare_hdmi_ddi_buffers()
223 const struct intel_crtc_state *crtc_state) in icl_pll_to_ddi_clk_sel() argument
225 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
226 int clock = crtc_state->port_clock; in icl_pll_to_ddi_clk_sel()
287 const struct intel_crtc_state *crtc_state) in intel_ddi_init_dp_buf_reg() argument
296 DDI_PORT_WIDTH(crtc_state->lane_count) | in intel_ddi_init_dp_buf_reg()
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| D | intel_dp_link_training.c | 259 const struct intel_crtc_state *crtc_state, in intel_dp_phy_voltage_max() argument
270 voltage_max = intel_dp->voltage_max(intel_dp, crtc_state); in intel_dp_phy_voltage_max()
314 const struct intel_crtc_state *crtc_state, in intel_dp_get_lane_adjust_tx_ffe_preset() argument
322 lane = min(lane, crtc_state->lane_count - 1); in intel_dp_get_lane_adjust_tx_ffe_preset()
325 for (lane = 0; lane < crtc_state->lane_count; lane++) in intel_dp_get_lane_adjust_tx_ffe_preset()
334 const struct intel_crtc_state *crtc_state, in intel_dp_get_lane_adjust_vswing_preemph() argument
345 lane = min(lane, crtc_state->lane_count - 1); in intel_dp_get_lane_adjust_vswing_preemph()
350 for (lane = 0; lane < crtc_state->lane_count; lane++) { in intel_dp_get_lane_adjust_vswing_preemph()
362 voltage_max = intel_dp_phy_voltage_max(intel_dp, crtc_state, dp_phy); in intel_dp_get_lane_adjust_vswing_preemph()
370 const struct intel_crtc_state *crtc_state, in intel_dp_get_lane_adjust_train() argument
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| D | intel_pch_display.c | 213 static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state, in ilk_pch_transcoder_set_timings() argument
216 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_pch_transcoder_set_timings()
218 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in ilk_pch_transcoder_set_timings()
237 static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state) in ilk_enable_pch_transcoder() argument
239 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_enable_pch_transcoder()
246 assert_shared_dpll_enabled(dev_priv, crtc_state->shared_dpll); in ilk_enable_pch_transcoder()
262 val |= TRANS_CHICKEN2_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in ilk_enable_pch_transcoder()
273 val |= TRANS_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in ilk_enable_pch_transcoder()
281 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in ilk_enable_pch_transcoder()
290 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in ilk_enable_pch_transcoder()
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| D | hsw_ips.c | 13 static void hsw_ips_enable(const struct intel_crtc_state *crtc_state) in hsw_ips_enable() argument
15 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_ips_enable()
18 if (!crtc_state->ips_enabled) in hsw_ips_enable()
27 !(crtc_state->active_planes & ~BIT(PLANE_CURSOR))); in hsw_ips_enable()
54 bool hsw_ips_disable(const struct intel_crtc_state *crtc_state) in hsw_ips_disable() argument
56 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_ips_disable()
60 if (!crtc_state->ips_enabled) in hsw_ips_disable()
182 bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) in hsw_crtc_state_ips_capable() argument
184 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_crtc_state_ips_capable()
194 if (crtc_state->pipe_bpp > 24) in hsw_crtc_state_ips_capable()
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| D | intel_ddi.h | 26 const struct intel_crtc_state *crtc_state);
28 const struct intel_crtc_state *crtc_state);
34 const struct intel_crtc_state *crtc_state);
37 struct intel_crtc_state *crtc_state,
40 const struct intel_crtc_state *crtc_state);
44 struct intel_crtc_state *crtc_state);
47 const struct intel_crtc_state *crtc_state);
53 const struct intel_crtc_state *crtc_state);
54 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
56 const struct intel_crtc_state *crtc_state);
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| D | intel_crtc.c | 86 u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) in intel_crtc_max_vblank_count() argument
88 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in intel_crtc_max_vblank_count()
96 if (crtc_state->mode_flags & (I915_MODE_FLAG_DSI_USE_TE0 | in intel_crtc_max_vblank_count()
105 (crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT))) in intel_crtc_max_vblank_count()
116 void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) in intel_crtc_vblank_on() argument
118 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_vblank_on()
122 intel_crtc_max_vblank_count(crtc_state)); in intel_crtc_vblank_on()
133 void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state) in intel_crtc_vblank_off() argument
135 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_vblank_off()
150 struct intel_crtc_state *crtc_state; in intel_crtc_state_alloc() local
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| D | intel_vdsc.c | 341 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) in intel_dsc_source_support() argument
343 const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsc_source_support()
345 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_source_support()
578 static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state) in intel_dsc_pps_configure() argument
580 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsc_pps_configure()
582 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dsc_pps_configure()
583 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_pps_configure()
588 u8 num_vdsc_instances = (crtc_state->dsc.dsc_split) ? 2 : 1; in intel_dsc_pps_configure()
591 if (crtc_state->bigjoiner_pipes) in intel_dsc_pps_configure()
617 if (crtc_state->dsc.dsc_split) in intel_dsc_pps_configure()
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| D | intel_display.c | 127 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
128 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
129 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
130 static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
131 static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
285 static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) in is_hdr_mode() argument
287 return (crtc_state->active_planes & in is_hdr_mode()
326 is_trans_port_sync_slave(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_slave() argument
328 return crtc_state->master_transcoder != INVALID_TRANSCODER; in is_trans_port_sync_slave()
332 is_trans_port_sync_master(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_master() argument
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| D | intel_hdmi.c | 198 const struct intel_crtc_state *crtc_state, in g4x_write_infoframe() argument
234 const struct intel_crtc_state *crtc_state, in g4x_read_infoframe() argument
270 const struct intel_crtc_state *crtc_state, in ibx_write_infoframe() argument
276 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_write_infoframe()
309 const struct intel_crtc_state *crtc_state, in ibx_read_infoframe() argument
314 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_read_infoframe()
349 const struct intel_crtc_state *crtc_state, in cpt_write_infoframe() argument
355 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in cpt_write_infoframe()
391 const struct intel_crtc_state *crtc_state, in cpt_read_infoframe() argument
396 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in cpt_read_infoframe()
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| D | skl_scaler.c | 92 skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, in skl_update_scaler() argument
99 &crtc_state->scaler_state; in skl_update_scaler()
100 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_update_scaler()
103 &crtc_state->hw.adjusted_mode; in skl_update_scaler()
119 if (DISPLAY_VER(dev_priv) >= 9 && crtc_state->hw.enable && in skl_update_scaler()
185 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state) in skl_update_scaler_crtc() argument
187 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in skl_update_scaler_crtc()
190 if (crtc_state->pch_pfit.enabled) { in skl_update_scaler_crtc()
191 width = drm_rect_width(&crtc_state->pch_pfit.dst); in skl_update_scaler_crtc()
192 height = drm_rect_height(&crtc_state->pch_pfit.dst); in skl_update_scaler_crtc()
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| D | intel_dp.h | 36 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
49 const struct intel_crtc_state *crtc_state);
51 const struct intel_crtc_state *crtc_state,
60 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
64 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
83 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
86 const struct intel_crtc_state *crtc_state,
90 const struct intel_crtc_state *crtc_state,
93 const struct intel_crtc_state *crtc_state,
96 struct intel_crtc_state *crtc_state,
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| D | intel_psr.c | 692 struct intel_crtc_state *crtc_state) in dc3co_is_pipe_port_compatible() argument
695 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; in dc3co_is_pipe_port_compatible()
707 struct intel_crtc_state *crtc_state) in tgl_dc3co_exitline_compute_config() argument
709 const u32 crtc_vdisplay = crtc_state->uapi.adjusted_mode.crtc_vdisplay; in tgl_dc3co_exitline_compute_config()
724 if (crtc_state->enable_psr2_sel_fetch) in tgl_dc3co_exitline_compute_config()
730 if (!dc3co_is_pipe_port_compatible(intel_dp, crtc_state)) in tgl_dc3co_exitline_compute_config()
742 intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 200) + 1; in tgl_dc3co_exitline_compute_config()
747 crtc_state->dc3co_exitline = crtc_vdisplay - exit_scanlines; in tgl_dc3co_exitline_compute_config()
751 struct intel_crtc_state *crtc_state) in intel_psr2_sel_fetch_config_valid() argument
762 if (crtc_state->uapi.async_flip) { in intel_psr2_sel_fetch_config_valid()
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| D | intel_vdsc.h | 16 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
17 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
18 void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
19 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
21 void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
26 const struct intel_crtc_state *crtc_state);
28 const struct intel_crtc_state *crtc_state);
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| D | intel_vrr.h | 21 void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
24 const struct intel_crtc_state *crtc_state);
25 void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
26 bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
29 struct intel_crtc_state *crtc_state);
30 int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
31 int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
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| D | intel_dsb.c | 125 void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state, in intel_dsb_indexed_reg_write() argument
128 struct intel_dsb *dsb = crtc_state->dsb; in intel_dsb_indexed_reg_write()
129 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsb_indexed_reg_write()
202 void intel_dsb_reg_write(const struct intel_crtc_state *crtc_state, in intel_dsb_reg_write() argument
205 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsb_reg_write()
210 dsb = crtc_state->dsb; in intel_dsb_reg_write()
236 void intel_dsb_commit(const struct intel_crtc_state *crtc_state) in intel_dsb_commit() argument
238 struct intel_dsb *dsb = crtc_state->dsb; in intel_dsb_commit()
239 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsb_commit()
293 void intel_dsb_prepare(struct intel_crtc_state *crtc_state) in intel_dsb_prepare() argument
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| D | intel_cursor.c | 131 static int intel_check_cursor(struct intel_crtc_state *crtc_state, in intel_check_cursor() argument
145 ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, in intel_check_cursor()
158 -crtc_state->pipe_src.x1, in intel_check_cursor()
159 -crtc_state->pipe_src.y1); in intel_check_cursor()
183 static u32 i845_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state) in i845_cursor_ctl_crtc() argument
187 if (crtc_state->gamma_enable) in i845_cursor_ctl_crtc()
193 static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state, in i845_cursor_ctl() argument
212 static int i845_check_cursor(struct intel_crtc_state *crtc_state, in i845_check_cursor() argument
219 ret = intel_check_cursor(crtc_state, plane_state); in i845_check_cursor()
251 plane_state->ctl = i845_cursor_ctl(crtc_state, plane_state); in i845_check_cursor()
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| /Linux-v6.1/drivers/gpu/drm/vkms/ |
| D | vkms_composer.c | 83 struct vkms_crtc_state *crtc_state, in blend() argument
87 struct vkms_plane_state **plane = crtc_state->active_planes; in blend()
88 u32 n_active_planes = crtc_state->num_active_planes; in blend()
92 size_t crtc_y_limit = crtc_state->base.crtc->mode.vdisplay; in blend()
114 static int check_format_funcs(struct vkms_crtc_state *crtc_state, in check_format_funcs() argument
117 struct vkms_plane_state **planes = crtc_state->active_planes; in check_format_funcs()
118 u32 n_active_planes = crtc_state->num_active_planes; in check_format_funcs()
130 static int check_iosys_map(struct vkms_crtc_state *crtc_state) in check_iosys_map() argument
132 struct vkms_plane_state **plane_state = crtc_state->active_planes; in check_iosys_map()
133 u32 n_active_planes = crtc_state->num_active_planes; in check_iosys_map()
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| /Linux-v6.1/drivers/gpu/drm/gma500/ |
| D | gma_display.c | 504 kfree(gma_crtc->crtc_state); in gma_crtc_destroy()
578 struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state; in gma_crtc_save() local
583 if (!crtc_state) { in gma_crtc_save()
588 crtc_state->saveDSPCNTR = REG_READ(map->cntr); in gma_crtc_save()
589 crtc_state->savePIPECONF = REG_READ(map->conf); in gma_crtc_save()
590 crtc_state->savePIPESRC = REG_READ(map->src); in gma_crtc_save()
591 crtc_state->saveFP0 = REG_READ(map->fp0); in gma_crtc_save()
592 crtc_state->saveFP1 = REG_READ(map->fp1); in gma_crtc_save()
593 crtc_state->saveDPLL = REG_READ(map->dpll); in gma_crtc_save()
594 crtc_state->saveHTOTAL = REG_READ(map->htotal); in gma_crtc_save()
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| /Linux-v6.1/drivers/gpu/drm/ |
| D | drm_self_refresh_helper.c | 78 struct drm_crtc_state *crtc_state; in drm_self_refresh_helper_entry_work() local
92 crtc_state = drm_atomic_get_crtc_state(state, crtc); in drm_self_refresh_helper_entry_work()
93 if (IS_ERR(crtc_state)) { in drm_self_refresh_helper_entry_work()
94 ret = PTR_ERR(crtc_state); in drm_self_refresh_helper_entry_work()
98 if (!crtc_state->enable) in drm_self_refresh_helper_entry_work()
110 crtc_state->active = false; in drm_self_refresh_helper_entry_work()
111 crtc_state->self_refresh_active = true; in drm_self_refresh_helper_entry_work()
190 struct drm_crtc_state *crtc_state; in drm_self_refresh_helper_alter_state() local
194 for_each_old_crtc_in_state(state, crtc, crtc_state, i) { in drm_self_refresh_helper_alter_state()
195 if (crtc_state->self_refresh_active) { in drm_self_refresh_helper_alter_state()
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